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zephyr/dts/riscv
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Michal Sieron dc98691c97 drivers: i2s: i2s_litex: Calculate offsets from DT 
To support both 8-bit and 32-bit Control/Status register variants, register
offsets need to be calculated from device tree.

Updated register data in device tree to the 32-bit CSR variant.
Renamed defines to be similar to other LiteX drivers.

Changed frequencies in clock-outputs nodes, so i2s/litex sample works.

Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
2022-05-27 15:27:11 -07:00
..
andes dts: riscv: andes: Move SoC devicetree includes under a vendor directory 2022-05-09 17:54:48 -04:00
espressif esp32/s2/c3: pinctrl: dts: move pinctrl node out of SoC bus 2022-05-13 11:25:58 -07:00
gigadevice dts: migrate includes to <zephyr/...> 2022-05-06 19:54:54 +02:00
ite dts: riscv: ite: Move SoC devicetree includes under a vendor directory 2022-05-09 17:54:48 -04:00
microsemi dts: riscv: microsemi: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
openisa dts: riscv: openisa: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
sifive dts: riscv: sifive: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
starfive dts: migrate includes to <zephyr/...> 2022-05-06 19:54:54 +02:00
telink dts: riscv: telink: Move SoC devicetree includes under a vendor dir 2022-05-09 17:54:48 -04:00
mpfs-icicle.dtsi dts: riscv: introduce Polarfire SOC QSPI interface 2022-05-06 11:32:54 +02:00
neorv32.dtsi dts: migrate includes to <zephyr/...> 2022-05-06 19:54:54 +02:00
riscv32-litex-vexriscv.dtsi drivers: i2s: i2s_litex: Calculate offsets from DT 2022-05-27 15:27:11 -07:00
virt.dtsi soc/riscv: add the QEMU "RISC-V VirtIO board" 2021-01-15 13:06:33 -05:00