6e27478c3d
This code had one purpose only, feed timing information into a test and was not used by anything else. The custom trace points unfortunatly were not accurate and this test was delivering informatin that conflicted with other tests we have due to placement of such trace points in the architecture and kernel code. For such measurements we are planning to use the tracing functionality in a special mode that would be used for metrics without polluting the architecture and kernel code with additional tracing and timing code. Furthermore, much of the assembly code used had issues. Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Daniel Leung <daniel.leung@intel.com>
72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <device.h>
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#include <drivers/timer/system_timer.h>
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#include <altera_common.h>
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#include "altera_avalon_timer_regs.h"
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#include "altera_avalon_timer.h"
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#include "legacy_api.h"
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static uint32_t accumulated_cycle_count;
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static int32_t _sys_idle_elapsed_ticks = 1;
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static void timer_irq_handler(const void *unused)
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{
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ARG_UNUSED(unused);
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accumulated_cycle_count += k_ticks_to_cyc_floor32(1);
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/* Clear the interrupt */
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alt_handle_irq((void *)TIMER_0_BASE, TIMER_0_IRQ);
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z_clock_announce(_sys_idle_elapsed_ticks);
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}
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int z_clock_driver_init(const struct device *device)
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{
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ARG_UNUSED(device);
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IOWR_ALTERA_AVALON_TIMER_PERIODL(TIMER_0_BASE,
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k_ticks_to_cyc_floor32(1) & 0xFFFF);
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IOWR_ALTERA_AVALON_TIMER_PERIODH(TIMER_0_BASE,
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(k_ticks_to_cyc_floor32(1) >> 16) & 0xFFFF);
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IRQ_CONNECT(TIMER_0_IRQ, 0, timer_irq_handler, NULL, 0);
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irq_enable(TIMER_0_IRQ);
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alt_avalon_timer_sc_init((void *)TIMER_0_BASE, 0,
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TIMER_0_IRQ, k_ticks_to_cyc_floor32(1));
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return 0;
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}
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uint32_t z_timer_cycle_get_32(void)
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{
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/* Per the Altera Embedded IP Peripherals guide, you cannot
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* use a timer instance for both the system clock and timestamps
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* at the same time.
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*
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* Having this function return accumulated_cycle_count + get_snapshot()
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* does not work reliably. It's possible for the current countdown
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* to reset to the next interval before the timer interrupt is
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* delivered (and accumulated cycle count gets updated). The result
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* is an unlucky call to this function will appear to jump backward
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* in time.
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*
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* To properly obtain timestamps, the CPU must be configured with
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* a second timer peripheral instance that is configured to
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* count down from some large initial 64-bit value. This
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* is currently unimplemented.
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*/
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return accumulated_cycle_count;
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}
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