df962d9a0e
I've found many problems with the SPI driver and this repairs many of them. The baud rate divisor was being derived from the CPU clock. But, some targets may have a seperate clock attached to SPI. If the soc.h file defines the symbol SPI_DW_SPI_CLOCK, it will use this instead of CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC for the baud rate calculation. completed() had a mistake where it would terminate the SPI transaction too early, well before the tx data has cleared the FIFO. I found I couldn't drive an OLED display correctly because completed() was wrong. The repair is to now consider a new flag called spi->last_tx, which will be set after the TX interrupt occurs with nothing to send any longer. There is also a while loop added to SPIN until BUSY drops. Another improvement is that push_data will NOT consider RX fifo size if there is no RX going on. The calculation here when RX is going on could go negative. I've added a check for that and prevent TX handling if RX buffer is full. I think that is the intention -- to deal with RX first if its fifos are more full. In spi_dw_transceive, if we are only doing spi_write w/o reading, don't enable RX interrupts at all. The OLED I'm working with failed to have a pull-up on MISO SPI signal. As a result, a huge number of garbage RX events arrive, and the interrupt handler finds there is no rx buffer, so it tosses the data. But this is a waist of realtime. It seems WRONG to enable RX interrupts if its something your not using, so software can GATE these spurious events in this way. With these changes, SPI can be used much more reliably, with FIFOs that are deeper, and SPI devices that only require TX. Change-Id: I0fe0745f2381c61c8a19ce086496b422a32a30a5 Signed-off-by: Chuck Jordan <cjordan@synopsys.com> |
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