3ab10f2d52
Hardware has asynchronous actions where the expectation is to spin on registers and expressions against those registers for completion of the action. This provides a common macro to spin, with a delay and timeout, on such expressions. Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
5 lines
93 B
YAML
5 lines
93 B
YAML
tests:
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lib.sys_util:
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platform_exclude: native_posix native_posix_64
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tags: sys_util
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