280ddaef4a
Add `mdio_read_c45()`/`mdio_write_c45()` APIs for Clause 45 access and remove the `protocol` MDIO binding property so that MDIO bus controller can support more than one protocol. A new MDIO header is introduced with generic opcodes, MMD and registers addresses, to be used by MDIO and PHY drivers. Existing MDIO drivers that support both Clause 22 and Clause 45 access are migrated to the new APIs. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
97 lines
2.3 KiB
C
97 lines
2.3 KiB
C
/*
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* Copyright 2022-2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/mdio.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(nxp_s32_emdio, CONFIG_MDIO_LOG_LEVEL);
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#include <Netc_EthSwt_Ip.h>
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#define MDIO_NODE DT_NODELABEL(emdio)
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#define NETC_SWT_IDX 0
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struct nxp_s32_mdio_config {
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const struct pinctrl_dev_config *pincfg;
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};
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struct nxp_s32_mdio_data {
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struct k_mutex rw_mutex;
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};
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static int nxp_s32_mdio_read(const struct device *dev, uint8_t prtad,
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uint8_t regad, uint16_t *regval)
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{
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struct nxp_s32_mdio_data *data = dev->data;
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Std_ReturnType status;
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k_mutex_lock(&data->rw_mutex, K_FOREVER);
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status = Netc_EthSwt_Ip_ReadTrcvRegister(NETC_SWT_IDX, prtad, regad, regval);
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k_mutex_unlock(&data->rw_mutex);
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return status == E_OK ? 0 : -EIO;
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}
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static int nxp_s32_mdio_write(const struct device *dev, uint8_t prtad,
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uint8_t regad, uint16_t regval)
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{
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struct nxp_s32_mdio_data *data = dev->data;
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Std_ReturnType status;
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k_mutex_lock(&data->rw_mutex, K_FOREVER);
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status = Netc_EthSwt_Ip_WriteTrcvRegister(NETC_SWT_IDX, prtad, regad, regval);
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k_mutex_unlock(&data->rw_mutex);
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return status == E_OK ? 0 : -EIO;
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}
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static int nxp_s32_mdio_initialize(const struct device *dev)
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{
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struct nxp_s32_mdio_data *data = dev->data;
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const struct nxp_s32_mdio_config *cfg = dev->config;
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int err;
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err = pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_DEFAULT);
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if (err != 0) {
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return err;
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}
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k_mutex_init(&data->rw_mutex);
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return 0;
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}
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static void nxp_s32_mdio_noop(const struct device *dev)
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{
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/* intentionally left empty */
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}
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static const struct mdio_driver_api nxp_s32_mdio_api = {
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.read = nxp_s32_mdio_read,
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.write = nxp_s32_mdio_write,
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/* NETC does not support enabling/disabling EMDIO controller independently */
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.bus_enable = nxp_s32_mdio_noop,
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.bus_disable = nxp_s32_mdio_noop,
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};
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PINCTRL_DT_DEFINE(MDIO_NODE);
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static struct nxp_s32_mdio_data nxp_s32_mdio0_data;
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static const struct nxp_s32_mdio_config nxp_s32_mdio0_cfg = {
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.pincfg = PINCTRL_DT_DEV_CONFIG_GET(MDIO_NODE),
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};
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DEVICE_DT_DEFINE(MDIO_NODE,
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&nxp_s32_mdio_initialize,
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NULL,
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&nxp_s32_mdio0_data,
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&nxp_s32_mdio0_cfg,
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POST_KERNEL,
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CONFIG_MDIO_INIT_PRIORITY,
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&nxp_s32_mdio_api);
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