537d5c310c
Convert all of the NXP SOCs with ENET to use the new binding scheme, which is used by the new driver. Convert any boards using this SOC to the new scheme as well, and remove from the documentation the bit about the experimental nature of the new driver and the overlay that shall no longer exist. Some of the boards I do not have the hardware of, so apologies if something breaks, as I have no way to know. All the boards were made sure to at least build. Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
446 lines
11 KiB
Plaintext
446 lines
11 KiB
Plaintext
/*
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* Copyright (c) 2022, NXP
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* SPDX-License-Identifier: Apache-2.0
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*
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* Note: File generated by gen_board_pinctrl.py
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* from mimxrt1064_evk.mex
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*/
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#include <nxp/nxp_imx/rt/mimxrt1064dvl6a-pinctrl.dtsi>
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&pinctrl {
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/* ADC1 inputs 0 and 15 */
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pinmux_adc1: pinmux_adc1 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>,
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<&iomuxc_gpio_ad_b1_10_adc1_in15>;
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bias-disable;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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/* conflicts with lpuart3 and flexcan1 */
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pinmux_csi: pinmux_csi {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_02_gpio1_io18>;
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drive-strength = "r0-6";
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bias-pull-down;
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bias-pull-down-value = "100k";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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group1 {
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pinmux = <&iomuxc_gpio_ad_b1_04_csi_pixclk>,
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<&iomuxc_gpio_ad_b1_05_csi_mclk>,
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<&iomuxc_gpio_ad_b1_06_csi_vsync>,
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<&iomuxc_gpio_ad_b1_07_csi_hsync>,
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<&iomuxc_gpio_ad_b1_08_csi_data09>,
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<&iomuxc_gpio_ad_b1_09_csi_data08>,
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<&iomuxc_gpio_ad_b1_10_csi_data07>,
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<&iomuxc_gpio_ad_b1_11_csi_data06>,
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<&iomuxc_gpio_ad_b1_12_csi_data05>,
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<&iomuxc_gpio_ad_b1_13_csi_data04>,
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<&iomuxc_gpio_ad_b1_14_csi_data03>,
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<&iomuxc_gpio_ad_b1_15_csi_data02>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_enet: pinmux_enet {
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group0 {
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pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
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bias-disable;
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drive-strength = "r0-6";
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slew-rate = "fast";
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nxp,speed = "50-mhz";
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input-enable;
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};
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group1 {
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pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
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<&iomuxc_gpio_b1_05_enet_rx_data1>,
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<&iomuxc_gpio_b1_06_enet_rx_en>,
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<&iomuxc_gpio_b1_07_enet_tx_data0>,
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<&iomuxc_gpio_b1_08_enet_tx_data1>,
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<&iomuxc_gpio_b1_09_enet_tx_en>,
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<&iomuxc_gpio_b1_11_enet_rx_er>;
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drive-strength = "r0-5";
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bias-pull-up;
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bias-pull-up-value = "100k";
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slew-rate = "fast";
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nxp,speed = "200-mhz";
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};
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};
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pinmux_enet_mdio: pinmux_enet_mdio {
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group0 {
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pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
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<&iomuxc_gpio_emc_41_enet_mdio>,
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<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
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<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
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drive-strength = "r0-5";
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bias-pull-up;
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bias-pull-up-value = "100k";
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slew-rate = "fast";
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nxp,speed = "200-mhz";
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};
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};
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pinmux_ptp: pinmux_ptp {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
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<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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/* conflicts with SAI1 */
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pinmux_flexcan1: pinmux_flexcan1 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>,
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<&iomuxc_gpio_ad_b1_09_flexcan1_rx>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_flexcan2: pinmux_flexcan2 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b0_14_flexcan2_tx>,
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<&iomuxc_gpio_ad_b0_15_flexcan2_rx>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_flexcan3: pinmux_flexcan3 {
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group0 {
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pinmux = <&iomuxc_gpio_emc_36_flexcan3_tx>,
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<&iomuxc_gpio_emc_37_flexcan3_rx>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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/* flexpwm output for board LED */
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pinmux_flexpwm2: pinmux_flexpwm2 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>;
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drive-strength = "r0-4";
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bias-pull-up;
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bias-pull-up-value = "47k";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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/* FLEXSPI1 is connected to external flash */
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pinmux_flexspi1: pinmux_flexspi1 {
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group0 {
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pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>,
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<&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>,
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<&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>,
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<&iomuxc_gpio_sd_b1_08_flexspi_a_data0>,
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<&iomuxc_gpio_sd_b1_09_flexspi_a_data1>,
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<&iomuxc_gpio_sd_b1_10_flexspi_a_data2>,
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<&iomuxc_gpio_sd_b1_11_flexspi_a_data3>;
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drive-strength = "r0-6";
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slew-rate = "fast";
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nxp,speed = "200-mhz";
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input-enable;
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};
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};
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/* Configures pin routing and optionally pin electrical features. */
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pinmux_lcdif: pinmux_lcdif {
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group0 {
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pinmux = <&iomuxc_gpio_b0_00_lcdif_clk>,
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<&iomuxc_gpio_b0_01_lcdif_enable>,
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<&iomuxc_gpio_b0_02_lcdif_hsync>,
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<&iomuxc_gpio_b0_03_lcdif_vsync>,
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<&iomuxc_gpio_b0_04_lcdif_data00>,
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<&iomuxc_gpio_b0_05_lcdif_data01>,
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<&iomuxc_gpio_b0_06_lcdif_data02>,
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<&iomuxc_gpio_b0_07_lcdif_data03>,
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<&iomuxc_gpio_b0_08_lcdif_data04>,
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<&iomuxc_gpio_b0_09_lcdif_data05>,
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<&iomuxc_gpio_b0_10_lcdif_data06>,
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<&iomuxc_gpio_b0_11_lcdif_data07>,
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<&iomuxc_gpio_b0_12_lcdif_data08>,
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<&iomuxc_gpio_b0_13_lcdif_data09>,
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<&iomuxc_gpio_b0_14_lcdif_data10>,
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<&iomuxc_gpio_b0_15_lcdif_data11>,
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<&iomuxc_gpio_b1_00_lcdif_data12>,
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<&iomuxc_gpio_b1_01_lcdif_data13>,
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<&iomuxc_gpio_b1_02_lcdif_data14>,
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<&iomuxc_gpio_b1_03_lcdif_data15>;
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drive-strength = "r0-6";
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input-schmitt-enable;
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bias-pull-up;
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bias-pull-up-value = "100k";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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group1 {
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pinmux = <&iomuxc_gpio_ad_b0_02_gpio1_io02>,
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<&iomuxc_gpio_b1_15_gpio2_io31>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_lpi2c1: pinmux_lpi2c1 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
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<&iomuxc_gpio_ad_b1_00_lpi2c1_scl>;
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drive-strength = "r0-6";
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drive-open-drain;
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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input-enable;
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};
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};
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/* Conflicts with USDHC pins. Connect R278, R279, R280, and R281 on evk board */
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pinmux_lpspi1: pinmux_lpspi1 {
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group0 {
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pinmux = <&iomuxc_gpio_sd_b0_01_lpspi1_pcs0>,
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<&iomuxc_gpio_sd_b0_00_lpspi1_sck>,
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<&iomuxc_gpio_sd_b0_03_lpspi1_sdi>,
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<&iomuxc_gpio_sd_b0_02_lpspi1_sdo>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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/* conflicts with lcdif pins */
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pinmux_lpspi3: pinmux_lpspi3 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b0_03_lpspi3_pcs0>,
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<&iomuxc_gpio_ad_b0_00_lpspi3_sck>,
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<&iomuxc_gpio_ad_b0_02_lpspi3_sdi>,
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<&iomuxc_gpio_ad_b0_01_lpspi3_sdo>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_lpuart1: pinmux_lpuart1 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>,
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<&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>;
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drive-strength = "r0";
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bias-pull-up;
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bias-pull-up-value = "100k";
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slew-rate = "slow";
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nxp,speed = "50-mhz";
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};
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group1 {
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pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_lpuart3: pinmux_lpuart3 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
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<&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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/* Flow control for lpuart3 */
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pinmux_lpuart3_flow_control: pinmux_lpuart3_flow_control {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
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<&iomuxc_gpio_ad_b1_07_lpuart3_rx>,
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<&iomuxc_gpio_ad_b1_04_lpuart3_cts_b>,
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<&iomuxc_gpio_ad_b1_05_lpuart3_rts_b>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_lpuart3_sleep: pinmux_lpuart3_sleep {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>;
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drive-strength = "r0";
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bias-pull-up;
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bias-pull-up-value = "100k";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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group1 {
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pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_sai1: pinmux_sai1 {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,
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<&iomuxc_gpio_ad_b1_13_sai1_tx_data0>,
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<&iomuxc_gpio_ad_b1_12_sai1_rx_data0>,
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<&iomuxc_gpio_ad_b1_14_sai1_tx_bclk>,
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<&iomuxc_gpio_ad_b1_15_sai1_tx_sync>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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/* note swo is configured with a cpu frequency of 132mhz and swo frequency of 7500khz */
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pinmux_swo: pinmux_swo {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b0_10_arm_trace_swo>;
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drive-strength = "r0-6";
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slew-rate = "fast";
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nxp,speed = "100-mhz";
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};
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};
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pinmux_usdhc1: pinmux_usdhc1 {
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group0 {
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pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
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bias-disable;
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drive-strength = "r0";
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input-schmitt-enable;
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slew-rate = "fast";
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nxp,speed = "100-mhz";
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};
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group1 {
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pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>,
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<&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
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<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
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<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
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<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
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<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
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drive-strength = "r0";
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input-schmitt-enable;
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bias-pull-up;
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bias-pull-up-value = "47k";
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slew-rate = "fast";
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nxp,speed = "100-mhz";
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};
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group2 {
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pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>;
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drive-strength = "r0-4";
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input-schmitt-enable;
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bias-pull-up;
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bias-pull-up-value = "47k";
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slew-rate = "fast";
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nxp,speed = "100-mhz";
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};
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group3 {
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pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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};
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/* fast pinmux settings for USDHC (over 100 Mhz) */
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pinmux_usdhc1_fast: pinmux_usdhc1_fast {
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group0 {
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pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
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bias-disable;
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drive-strength = "r0-7";
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input-schmitt-enable;
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slew-rate = "fast";
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nxp,speed = "200-mhz";
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};
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group1 {
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pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
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<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
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<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
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<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
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<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
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drive-strength = "r0-7";
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input-schmitt-enable;
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bias-pull-up;
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bias-pull-up-value = "47k";
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slew-rate = "fast";
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nxp,speed = "200-mhz";
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};
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};
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/* medium pinmux settings for USDHC (under 100 Mhz) */
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pinmux_usdhc1_med: pinmux_usdhc1_med {
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group0 {
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pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
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bias-disable;
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drive-strength = "r0-7";
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input-schmitt-enable;
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slew-rate = "fast";
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nxp,speed = "100-mhz";
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};
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group1 {
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pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
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<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
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<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
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<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
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<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
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drive-strength = "r0-7";
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input-schmitt-enable;
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bias-pull-up;
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bias-pull-up-value = "47k";
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slew-rate = "fast";
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nxp,speed = "100-mhz";
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};
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};
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/* slow pinmux settings for USDHC (under 50 Mhz) */
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pinmux_usdhc1_slow: pinmux_usdhc1_slow {
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group0 {
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pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
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bias-disable;
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|
drive-strength = "r0-7";
|
|
input-schmitt-enable;
|
|
slew-rate = "fast";
|
|
nxp,speed = "50-mhz";
|
|
};
|
|
group1 {
|
|
pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
|
|
<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
|
|
<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
|
|
<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
|
|
<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
|
|
drive-strength = "r0-7";
|
|
input-schmitt-enable;
|
|
bias-pull-up;
|
|
bias-pull-up-value = "47k";
|
|
slew-rate = "fast";
|
|
nxp,speed = "50-mhz";
|
|
};
|
|
};
|
|
|
|
};
|
|
|