537d5c310c
Convert all of the NXP SOCs with ENET to use the new binding scheme, which is used by the new driver. Convert any boards using this SOC to the new scheme as well, and remove from the documentation the bit about the experimental nature of the new driver and the overlay that shall no longer exist. Some of the boards I do not have the hardware of, so apologies if something breaks, as I have no way to know. All the boards were made sure to at least build. Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
366 lines
7.2 KiB
Plaintext
366 lines
7.2 KiB
Plaintext
/*
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* Copyright (c) 2018, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_rt1064.dtsi>
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#include "mimxrt1064_evk-pinctrl.dtsi"
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#include <zephyr/dt-bindings/display/panel.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "NXP MIMXRT1064-EVK board";
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compatible = "nxp,mimxrt1064";
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aliases {
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led0 = &green_led;
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pwm-led0 = &green_pwm_led;
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sw0 = &user_button;
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watchdog0 = &wdog0;
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sdhc0 = &usdhc1;
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};
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chosen {
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zephyr,flash-controller = &is25wp064;
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zephyr,flash = &w25q32jvwj0;
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zephyr,code-partition = &slot0_partition;
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zephyr,sram = &sdram0;
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zephyr,itcm = &itcm;
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zephyr,dtcm = &dtcm;
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zephyr,console = &lpuart1;
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zephyr,shell-uart = &lpuart1;
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zephyr,canbus = &flexcan2;
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zephyr,display = &lcdif;
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};
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sdram0: memory@80000000 {
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/* Micron MT48LC16M16A2B4-6AIT:G */
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device_type = "memory";
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reg = <0x80000000 DT_SIZE_M(32)>;
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};
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leds {
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compatible = "gpio-leds";
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green_led: led-1 {
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gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
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label = "User LD1";
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};
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};
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pwmleds {
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compatible = "pwm-leds";
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green_pwm_led: green_pwm_led {
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pwms = <&flexpwm2_pwm3 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button: button-1 {
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label = "User SW8";
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gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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lvgl_pointer {
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compatible = "zephyr,lvgl-pointer-input";
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input = <&ft5336>;
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};
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arduino_header: connector {
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compatible = "arduino-header-r3";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpio1 26 0>, /* A0 */
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<1 0 &gpio1 27 0>, /* A1 */
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<2 0 &gpio1 20 0>, /* A2 */
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<3 0 &gpio1 21 0>, /* A3 */
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<4 0 &gpio1 17 0>, /* A4 */
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<5 0 &gpio1 16 0>, /* A5 */
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<6 0 &gpio1 23 0>, /* D0 */
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<7 0 &gpio1 22 0>, /* D1 */
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<8 0 &gpio1 11 0>, /* D2 */
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<9 0 &gpio1 24 0>, /* D3 */
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<10 0 &gpio1 9 0>, /* D4 */
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<11 0 &gpio1 10 0>, /* D5 */
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<12 0 &gpio1 18 0>, /* D6 */
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<13 0 &gpio1 19 0>, /* D7 */
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<14 0 &gpio1 3 0>, /* D8 */
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<15 0 &gpio1 2 0>, /* D9 */
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<16 0 &gpio3 13 0>, /* D10 */
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<17 0 &gpio3 14 0>, /* D11 */
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<18 0 &gpio3 15 0>, /* D12 */
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<19 0 &gpio3 12 0>, /* D13 */
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<20 0 &gpio1 17 0>, /* D14 */
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<21 0 &gpio1 16 0>; /* D15 */
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};
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panel {
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compatible = "rocktech,rk043fn02h-ct";
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port {
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lcd_panel_in: endpoint {
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remote-endpoint = <&lcd_panel_out>;
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};
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};
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};
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};
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arduino_i2c: &lpi2c1 {};
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&lcdif {
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status = "okay";
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width = <480>;
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height = <272>;
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display-timings {
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compatible = "zephyr,panel-timing";
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hsync-len = <41>;
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hfront-porch = <4>;
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hback-porch = <8>;
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vsync-len = <10>;
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vfront-porch = <4>;
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vback-porch = <2>;
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de-active= <1>;
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pixelclk-active = <1>;
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hsync-active = <0>;
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vsync-active = <0>;
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clock-frequency = <9210240>;
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};
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pixel-format = <PANEL_PIXEL_FORMAT_BGR_565>;
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data-bus-width = "16-bit";
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pinctrl-0 = <&pinmux_lcdif>;
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pinctrl-names = "default";
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backlight-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;
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port {
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lcd_panel_out: endpoint {
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remote-endpoint = <&lcd_panel_in>;
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};
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};
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};
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&lpi2c1 {
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status = "okay";
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pinctrl-0 = <&pinmux_lpi2c1>;
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pinctrl-names = "default";
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mt9m114: mt9m114@48 {
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compatible = "aptina,mt9m114";
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reg = <0x48>;
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status = "okay";
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port {
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mt9m114_ep_out: endpoint {
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remote-endpoint = <&csi_ep_in>;
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};
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};
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};
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ft5336: ft5336@38 {
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compatible = "focaltech,ft5336";
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reg = <0x38>;
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int-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
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};
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};
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&flexspi {
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status = "okay";
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pinctrl-0 = <&pinmux_flexspi1>;
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pinctrl-names = "default";
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ahb-prefetch;
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ahb-read-addr-opt;
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rx-clock-source = <1>;
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reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>;
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is25wp064: is25wp064@0 {
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compatible = "nxp,imx-flexspi-nor";
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size = <67108864>;
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reg = <0>;
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spi-max-frequency = <133000000>;
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status = "okay";
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jedec-id = [9d 70 17];
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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storage_partition: partition@0 {
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label = "storage";
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reg = <0x00000000 DT_SIZE_M(8)>;
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};
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};
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};
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};
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&w25q32jvwj0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 DT_SIZE_K(64)>;
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};
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/* Note slot 0 has one additional sector,
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* this is intended for use with the swap move algorithm
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*/
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slot0_partition: partition@10000 {
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label = "image-0";
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reg = <0x00010000 DT_SIZE_K(2016)>;
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};
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slot1_partition: partition@208000 {
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label = "image-1";
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reg = <0x00208000 DT_SIZE_K(2012)>;
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};
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};
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};
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&lpuart1 {
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status = "okay";
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pinctrl-0 = <&pinmux_lpuart1>;
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pinctrl-1 = <&pinmux_lpuart1_sleep>;
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pinctrl-names = "default", "sleep";
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current-speed = <115200>;
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};
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arduino_serial: &lpuart3 {
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current-speed = <115200>;
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pinctrl-0 = <&pinmux_lpuart3>;
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pinctrl-1 = <&pinmux_lpuart3_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&enet_mac {
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status = "okay";
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pinctrl-0 = <&pinmux_enet>;
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pinctrl-names = "default";
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phy-handle = <&phy>;
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zephyr,random-mac-address;
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phy-connection-type = "rmii";
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};
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&enet_mdio {
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status = "okay";
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pinctrl-0 = <&pinmux_enet_mdio>;
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pinctrl-names = "default";
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phy: phy@0 {
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compatible = "microchip,ksz8081";
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reg = <0>;
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status = "okay";
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mc,reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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mc,interrupt-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
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mc,interface-type = "rmii";
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};
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};
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&enet_ptp_clock {
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status = "okay";
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pinctrl-0 = <&pinmux_ptp>;
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pinctrl-names = "default";
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};
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zephyr_udc0: &usb1 {
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status = "okay";
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};
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&csi {
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status = "okay";
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sensor = <&mt9m114>;
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pinctrl-0 = <&pinmux_csi>;
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pinctrl-names = "default";
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port {
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csi_ep_in: endpoint {
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remote-endpoint = <&mt9m114_ep_out>;
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};
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};
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};
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&flexpwm2_pwm3 {
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status = "okay";
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pinctrl-0 = <&pinmux_flexpwm2>;
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pinctrl-names = "default";
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};
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&usdhc1 {
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status = "okay";
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pwr-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
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cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&pinmux_usdhc1>;
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pinctrl-1 = <&pinmux_usdhc1_slow>;
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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sdmmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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};
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};
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&edma0 {
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status = "okay";
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};
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&flexcan2 {
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status = "okay";
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bus-speed = <125000>;
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pinctrl-0 = <&pinmux_flexcan2>;
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pinctrl-names = "default";
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can-transceiver {
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max-bitrate = <5000000>;
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};
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};
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&wdog0 {
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status = "okay";
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};
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&lpspi1 {
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status = "okay";
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/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
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dmas = <&edma0 0 13>, <&edma0 1 14>;
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dma-names = "rx", "tx";
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pinctrl-0 = <&pinmux_lpspi1>;
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pinctrl-names = "default";
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};
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&lpspi3 {
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status = "okay";
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/* DMA channels 2 and 3, muxed to LPSPI3 RX and TX */
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dmas = <&edma0 2 15>, <&edma0 3 16>;
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dma-names = "rx", "tx";
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pinctrl-0 = <&pinmux_lpspi3>;
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pinctrl-names = "default";
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};
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&adc1 {
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status = "okay";
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pinctrl-0 = <&pinmux_adc1>;
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pinctrl-names = "default";
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};
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/* GPT and Systick are enabled. If power management is enabled, the GPT
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* timer will be used instead of systick, as allows the core clock to
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* be gated.
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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&systick {
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status = "okay";
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};
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&itm {
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pinctrl-0 = <&pinmux_swo>;
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pinctrl-names = "default";
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};
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