9e4b57398f
Although the RT1015 only supports 128 KB of FlexRAM being used at once, the
default fusemap overallocates 160KB of FlexRAM. The JLink flashloader
algorithm appears to rely on the 64KB of DTCM in the default fusemap
being configured. Reducing the DTCM allocation resulted in JLink
failing to flash the SOC.
To resolve this, utilize the default fusemap of {O, O, D, D, I} for the
RT1015 FlexRAM setup. Add a note about the restrictions on using
overallocated FlexRAM to the SOC DTSI.
Fixes #65889
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
145 lines
3.6 KiB
Plaintext
145 lines
3.6 KiB
Plaintext
/*
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* Copyright (c) 2019, Linaro
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* Copyright (c) 2022, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/nxp_rt10xx.dtsi>
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&flexram {
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flexram,num-ram-banks = <5>;
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/* Note: RT1015 has five flexram banks, but only 4 of the 5 can
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* be used at the same time, for a total of 128KB of RAM.
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*/
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flexram,bank-spec = <FLEXRAM_OCRAM>,
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<FLEXRAM_OCRAM>,
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<FLEXRAM_DTCM>,
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<FLEXRAM_DTCM>,
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<FLEXRAM_ITCM>;
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};
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&sysclk {
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clock-frequency = <500000000>;
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};
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&itcm {
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reg = <0x00000000 DT_SIZE_K(32)>;
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};
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&dtcm {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};
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&ocram {
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reg = <0x20200000 DT_SIZE_K(64)>;
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};
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&ccm {
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ipg-podf {
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clock-div = <4>;
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};
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};
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&gpt2 {
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gptfreq = <12500000>;
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};
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/* RT1015 only has two LPSPI blocks */
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/delete-node/ &lpspi3;
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/delete-node/ &lpspi4;
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/ {
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soc {
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/* Remove ADC2, it doesn't exist on RT1015 */
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/delete-node/ adc@400C8000;
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/* GPIOS 4 and 6-9 are not preset on RT1015 */
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/delete-node/ gpio@401c4000;
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/delete-node/ gpio@42000000;
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/delete-node/ gpio@42004000;
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/delete-node/ gpio@42008000;
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/delete-node/ gpio@4200c000;
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/* RT1015 has only one flexSPI controller */
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/delete-node/ spi@402a4000;
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};
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};
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/*
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* GPIO pinmux options. These options define the pinmux settings
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* for GPIO ports on the package, so that the GPIO driver can
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* select GPIO mux options during GPIO configuration.
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*/
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&gpio1{
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pinmux = <&iomuxc_gpio_ad_b0_00_gpio1_io00>,
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<&iomuxc_gpio_ad_b0_01_gpio1_io01>,
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<&iomuxc_gpio_ad_b0_02_gpio1_io02>,
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<&iomuxc_gpio_ad_b0_03_gpio1_io03>,
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<&iomuxc_gpio_ad_b0_04_gpio1_io04>,
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<&iomuxc_gpio_ad_b0_05_gpio1_io05>,
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<&iomuxc_gpio_ad_b0_06_gpio1_io06>,
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<&iomuxc_gpio_ad_b0_07_gpio1_io07>,
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<&iomuxc_gpio_ad_b0_08_gpio1_io08>,
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<&iomuxc_gpio_ad_b0_09_gpio1_io09>,
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<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
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<&iomuxc_gpio_ad_b0_11_gpio1_io11>,
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<&iomuxc_gpio_ad_b0_12_gpio1_io12>,
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<&iomuxc_gpio_ad_b0_13_gpio1_io13>,
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<&iomuxc_gpio_ad_b0_14_gpio1_io14>,
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<&iomuxc_gpio_ad_b0_15_gpio1_io15>,
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<&iomuxc_gpio_ad_b1_10_gpio1_io26>,
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<&iomuxc_gpio_ad_b1_11_gpio1_io27>,
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<&iomuxc_gpio_ad_b1_12_gpio1_io28>,
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<&iomuxc_gpio_ad_b1_13_gpio1_io29>,
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<&iomuxc_gpio_ad_b1_14_gpio1_io30>,
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<&iomuxc_gpio_ad_b1_15_gpio1_io31>;
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gpio-reserved-ranges = <16 10>;
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};
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&gpio2{
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pinmux = <&iomuxc_gpio_emc_04_gpio2_io04>,
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<&iomuxc_gpio_emc_05_gpio2_io05>,
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<&iomuxc_gpio_emc_06_gpio2_io06>,
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<&iomuxc_gpio_emc_07_gpio2_io07>,
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<&iomuxc_gpio_emc_08_gpio2_io08>,
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<&iomuxc_gpio_emc_09_gpio2_io09>,
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<&iomuxc_gpio_emc_16_gpio2_io16>,
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<&iomuxc_gpio_emc_17_gpio2_io17>,
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<&iomuxc_gpio_emc_18_gpio2_io18>,
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<&iomuxc_gpio_emc_19_gpio2_io19>,
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<&iomuxc_gpio_emc_20_gpio2_io20>,
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<&iomuxc_gpio_emc_21_gpio2_io21>,
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<&iomuxc_gpio_emc_22_gpio2_io22>,
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<&iomuxc_gpio_emc_23_gpio2_io23>,
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<&iomuxc_gpio_emc_24_gpio2_io24>,
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<&iomuxc_gpio_emc_25_gpio2_io25>,
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<&iomuxc_gpio_emc_26_gpio2_io26>,
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<&iomuxc_gpio_emc_27_gpio2_io27>;
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gpio-reserved-ranges = <0 4>, <10 6>;
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};
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&gpio3{
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pinmux = <&iomuxc_gpio_emc_32_gpio3_io00>,
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<&iomuxc_gpio_emc_33_gpio3_io01>,
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<&iomuxc_gpio_emc_34_gpio3_io02>,
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<&iomuxc_gpio_emc_35_gpio3_io03>,
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<&iomuxc_gpio_sd_b1_00_gpio3_io20>,
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<&iomuxc_gpio_sd_b1_01_gpio3_io21>,
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<&iomuxc_gpio_sd_b1_02_gpio3_io22>,
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<&iomuxc_gpio_sd_b1_03_gpio3_io23>,
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<&iomuxc_gpio_sd_b1_04_gpio3_io24>,
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<&iomuxc_gpio_sd_b1_05_gpio3_io25>,
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<&iomuxc_gpio_sd_b1_06_gpio3_io26>,
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<&iomuxc_gpio_sd_b1_07_gpio3_io27>,
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<&iomuxc_gpio_sd_b1_08_gpio3_io28>,
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<&iomuxc_gpio_sd_b1_09_gpio3_io29>,
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<&iomuxc_gpio_sd_b1_10_gpio3_io30>,
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<&iomuxc_gpio_sd_b1_11_gpio3_io31>;
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gpio-reserved-ranges = <4 16>;
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};
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&gpio5{
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pinmux = <&iomuxc_snvs_pmic_on_req_gpio5_io01>;
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gpio-reserved-ranges = <0 1>;
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};
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