zephyr/samples/subsys/logging
Wentong Wu 78cc4cb6a3 samples: add sample for logging syst format output
add sample for syst format output to prove the output can be
decoded by the existing decoder.

Fixes: #19841.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2019-10-29 10:18:51 +01:00
..
logger x86: consolidate x86_64 architecture, SoC and boards 2019-10-25 17:57:55 -04:00
syst samples: add sample for logging syst format output 2019-10-29 10:18:51 +01:00
logging.rst sample: subsys: logging: kernel_event_logger: Add sample application 2017-11-02 22:22:54 -04:00