f2b7492269
The default kernel init priority is too low. Make this configurable and set the default priority so that the ethernet driver is started just before the network stack. This commit adds generic ethernet priority and changes currently available ethernet drivers to use it. Change-Id: If695e52b6dd9ea227f10ba306bb145d72d2312b0 Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
102 lines
2.4 KiB
Plaintext
102 lines
2.4 KiB
Plaintext
# Kconfig - ETH_ENC28J60 Ethernet driver configuration options
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#
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# Copyright (c) 2015 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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menuconfig ETH_ENC28J60
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bool "ENC28J60C Ethernet Controller"
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depends on ETHERNET || NET_L2_ETHERNET
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depends on SPI
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default n
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help
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ENC28J60C Stand-Alone Ethernet Controller
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with SPI Interface
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config ETH_ENC28J60_0
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bool "ENC28J60C Ethernet port 0"
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depends on ETH_ENC28J60
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default n
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help
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Include port 0 driver
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if ETH_ENC28J60 && ETH_ENC28J60_0
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config ETH_ENC28J60_0_NAME
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string "Driver's name"
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default "ETH_0"
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config ETH_EN28J60_0_FULL_DUPLEX
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bool "ENC28J60 full duplex"
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default y
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help
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Enable Full Duplex. Device is configured half duplex
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when disabled.
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config ETH_ENC28J60_0_GPIO_PORT_NAME
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string "GPIO controller port name"
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default "GPIO_0"
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help
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GPIO port name through which ENC28J60C interruption is received.
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config ETH_ENC28J60_0_GPIO_PIN
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int "ENC28J60C INT GPIO PIN"
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default 24
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help
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GPIO pin number used to conect INT
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config ETH_ENC28J60_0_SPI_PORT_NAME
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string "SPI master controller port name"
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default "SPI_0"
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help
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Master I2C port name through which ENC28J60C chip is accessed.
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config ETH_ENC28J60_0_SLAVE
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hex "ETH_ENC28J60 SPI slave select pin"
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default 1
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help
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ENC28J60C chip select pin.
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config ETH_ENC28J60_0_SPI_BUS_FREQ
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int "ENC28J60C SPI bus speed in Hz"
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default 128
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help
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This is the maximum supported SPI bus frequency.
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config ETH_ENC28J60_0_MAC3
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hex "MAC Address Byte 3"
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default 0
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help
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MACADDR<0:23> are Microchip's OUI.
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This is the byte 3 of the MAC address.
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MACADDR<31:24>
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config ETH_ENC28J60_0_MAC4
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hex "MAC Address Byte 4"
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default 0
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help
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MACADDR<0:23> are Microchip's OUI.
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This is the byte 4 of the MAC address.
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MACADDR<40:32>
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config ETH_ENC28J60_0_MAC5
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hex "MAC Address Byte 5"
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default 0
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help
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MACADDR<0:23> are Microchip's OUI.
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This is the byte 5 of the MAC address.
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MACADDR<48:41>
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endif #ETH_ENC28J60 && ETH_ENC28J60_0
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