5e2678135d
Some paramaters in prior emulators have historically referred to instances of struct emul as "emulator" or "emul". The proper parameter name for this type is "target" as it designates the struct emul instance is the emul bus (e.g. emul_i2c) controller's target peripheral for dispatch. Do a small refactor renaming some of these parameters to "target". TEST=twister on accel, espi, and eeprom drivers tests Signed-off-by: Aaron Massey <aaronmassey@google.com>
353 lines
9.1 KiB
C
353 lines
9.1 KiB
C
/*
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* Copyright 2020 Google LLC
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Emulator for the Bosch BMI160 accelerometer / gyro. This supports basic
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* init and reading of canned samples. It supports both I2C and SPI buses.
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*/
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#define DT_DRV_COMPAT bosch_bmi160
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#define LOG_LEVEL CONFIG_SPI_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(bosch_bmi160);
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#include <zephyr/sys/byteorder.h>
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#include <bmi160.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/emul.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/i2c_emul.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/drivers/spi_emul.h>
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/** Run-time data used by the emulator */
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struct bmi160_emul_data {
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uint8_t pmu_status;
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/** Current register to read (address) */
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uint32_t cur_reg;
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};
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/** Static configuration for the emulator */
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struct bmi160_emul_cfg {
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/** Label of the SPI bus this emulator connects to */
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const char *bus_label;
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/** Chip registers */
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uint8_t *reg;
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union {
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/** Unit address (chip select ordinal) of emulator */
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uint16_t chipsel;
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/** I2C address of emulator */
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uint16_t addr;
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};
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};
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/* Names for the PMU components */
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static const char *const pmu_name[] = { "acc", "gyr", "mag", "INV" };
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static void sample_read(union bmi160_sample *buf)
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{
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/*
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* Use hard-coded scales to get values just above 0, 1, 2 and
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* 3, 4, 5. Values are stored in little endianness.
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* gyr[x] = 0x0b01 // 3 * 1000000 / BMI160_GYR_SCALE(2000) + 1
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* gyr[y] = 0x0eac // 4 * 1000000 / BMI160_GYR_SCALE(2000) + 1
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* gyr[z] = 0x1257 // 5 * 1000000 / BMI160_GYR_SCALE(2000) + 1
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* acc[x] = 0x0001 // 0 * 1000000 / BMI160_ACC_SCALE(2) + 1
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* acc[y] = 0x0689 // 1 * 1000000 / BMI160_ACC_SCALE(2) + 1
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* acc[z] = 0x0d11 // 2 * 1000000 / BMI160_ACC_SCALE(2) + 1
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*/
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static uint8_t raw_data[] = { 0x01, 0x0b, 0xac, 0x0e, 0x57, 0x12,
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0x01, 0x00, 0x89, 0x06, 0x11, 0x0d };
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LOG_INF("Sample read");
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memcpy(buf->raw, raw_data, ARRAY_SIZE(raw_data));
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}
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static void reg_write(const struct emul *target, int regn, int val)
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{
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struct bmi160_emul_data *data = target->data;
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const struct bmi160_emul_cfg *cfg = target->cfg;
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LOG_INF("write %x = %x", regn, val);
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cfg->reg[regn] = val;
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switch (regn) {
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case BMI160_REG_ACC_CONF:
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LOG_INF(" * acc conf");
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break;
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case BMI160_REG_ACC_RANGE:
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LOG_INF(" * acc range");
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break;
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case BMI160_REG_GYR_CONF:
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LOG_INF(" * gyr conf");
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break;
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case BMI160_REG_GYR_RANGE:
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LOG_INF(" * gyr range");
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break;
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case BMI160_REG_CMD:
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switch (val) {
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case BMI160_CMD_SOFT_RESET:
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LOG_INF(" * soft reset");
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break;
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default:
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if ((val & BMI160_CMD_PMU_BIT) == BMI160_CMD_PMU_BIT) {
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int which = (val & BMI160_CMD_PMU_MASK) >> BMI160_CMD_PMU_SHIFT;
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int shift;
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int pmu_val = val & BMI160_CMD_PMU_VAL_MASK;
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switch (which) {
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case 0:
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shift = BMI160_PMU_STATUS_ACC_POS;
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break;
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case 1:
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shift = BMI160_PMU_STATUS_GYR_POS;
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break;
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case 2:
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default:
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shift = BMI160_PMU_STATUS_MAG_POS;
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break;
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}
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data->pmu_status &= 3 << shift;
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data->pmu_status |= pmu_val << shift;
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LOG_INF(" * pmu %s = %x, new status %x", pmu_name[which], pmu_val,
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data->pmu_status);
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} else {
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LOG_INF("Unknown command %x", val);
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}
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break;
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}
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break;
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default:
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LOG_INF("Unknown write %x", regn);
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}
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}
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static int reg_read(const struct emul *target, int regn)
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{
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struct bmi160_emul_data *data = target->data;
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const struct bmi160_emul_cfg *cfg = target->cfg;
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int val;
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LOG_INF("read %x =", regn);
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val = cfg->reg[regn];
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switch (regn) {
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case BMI160_REG_CHIPID:
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LOG_INF(" * get chipid");
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break;
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case BMI160_REG_PMU_STATUS:
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LOG_INF(" * get pmu");
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val = data->pmu_status;
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break;
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case BMI160_REG_STATUS:
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LOG_INF(" * status");
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val |= BMI160_DATA_READY_BIT_MASK;
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break;
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case BMI160_REG_ACC_CONF:
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LOG_INF(" * acc conf");
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break;
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case BMI160_REG_GYR_CONF:
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LOG_INF(" * gyr conf");
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break;
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case BMI160_SPI_START:
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LOG_INF(" * Bus start");
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break;
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case BMI160_REG_ACC_RANGE:
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LOG_INF(" * acc range");
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break;
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case BMI160_REG_GYR_RANGE:
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LOG_INF(" * gyr range");
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break;
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default:
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LOG_INF("Unknown read %x", regn);
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}
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LOG_INF(" = %x", val);
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return val;
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}
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#if BMI160_BUS_SPI
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static int bmi160_emul_io_spi(const struct emul *target, const struct spi_config *config,
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const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs)
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{
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struct bmi160_emul_data *data;
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const struct spi_buf *tx, *txd, *rxd;
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unsigned int regn, val;
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int count;
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ARG_UNUSED(config);
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data = target->data;
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__ASSERT_NO_MSG(tx_bufs || rx_bufs);
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__ASSERT_NO_MSG(!tx_bufs || !rx_bufs || tx_bufs->count == rx_bufs->count);
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count = tx_bufs ? tx_bufs->count : rx_bufs->count;
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switch (count) {
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case 2:
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tx = tx_bufs->buffers;
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txd = &tx_bufs->buffers[1];
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rxd = rx_bufs ? &rx_bufs->buffers[1] : NULL;
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switch (tx->len) {
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case 1:
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regn = *(uint8_t *)tx->buf;
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if ((regn & BMI160_REG_READ) && rxd == NULL) {
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LOG_ERR("Cannot read without rxd");
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return -EPERM;
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}
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switch (txd->len) {
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case 1:
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if (regn & BMI160_REG_READ) {
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regn &= BMI160_REG_MASK;
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val = reg_read(target, regn);
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*(uint8_t *)rxd->buf = val;
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} else {
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val = *(uint8_t *)txd->buf;
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reg_write(target, regn, val);
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}
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break;
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case BMI160_SAMPLE_SIZE:
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if (regn & BMI160_REG_READ) {
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sample_read(rxd->buf);
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} else {
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LOG_INF("Unknown sample write");
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}
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break;
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default:
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LOG_INF("Unknown A txd->len %d", txd->len);
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break;
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}
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break;
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default:
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LOG_INF("Unknown tx->len %d", tx->len);
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break;
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}
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break;
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default:
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LOG_INF("Unknown tx_bufs->count %d", count);
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break;
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}
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return 0;
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}
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#endif
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#if BMI160_BUS_I2C
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static int bmi160_emul_transfer_i2c(const struct emul *target, struct i2c_msg *msgs, int num_msgs,
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int addr)
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{
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struct bmi160_emul_data *data;
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unsigned int val;
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data = target->data;
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__ASSERT_NO_MSG(msgs && num_msgs);
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i2c_dump_msgs("emul", msgs, num_msgs, addr);
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switch (num_msgs) {
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case 2:
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if (msgs->flags & I2C_MSG_READ) {
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LOG_ERR("Unexpected read");
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return -EIO;
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}
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if (msgs->len != 1) {
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LOG_ERR("Unexpected msg0 length %d", msgs->len);
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return -EIO;
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}
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data->cur_reg = msgs->buf[0];
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/* Now process the 'read' part of the message */
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msgs++;
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if (msgs->flags & I2C_MSG_READ) {
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switch (msgs->len) {
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case 1:
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val = reg_read(target, data->cur_reg);
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msgs->buf[0] = val;
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break;
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case BMI160_SAMPLE_SIZE:
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sample_read((void *)msgs->buf);
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break;
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default:
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LOG_ERR("Unexpected msg1 length %d", msgs->len);
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return -EIO;
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}
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} else {
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if (msgs->len != 1) {
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LOG_ERR("Unexpected msg1 length %d", msgs->len);
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}
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reg_write(target, data->cur_reg, msgs->buf[0]);
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}
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break;
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default:
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LOG_ERR("Invalid number of messages: %d", num_msgs);
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return -EIO;
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}
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return 0;
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}
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#endif
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/* Device instantiation */
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#if BMI160_BUS_SPI
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static struct spi_emul_api bmi160_emul_api_spi = {
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.io = bmi160_emul_io_spi,
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};
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#endif
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#if BMI160_BUS_I2C
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static struct i2c_emul_api bmi160_emul_api_i2c = {
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.transfer = bmi160_emul_transfer_i2c,
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};
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#endif
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static int emul_bosch_bmi160_init(const struct emul *target, const struct device *parent)
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{
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const struct bmi160_emul_cfg *cfg = target->cfg;
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struct bmi160_emul_data *data = target->data;
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uint8_t *reg = cfg->reg;
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ARG_UNUSED(parent);
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data->pmu_status = 0;
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reg[BMI160_REG_CHIPID] = BMI160_CHIP_ID;
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return 0;
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}
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#define BMI160_EMUL_DATA(n) \
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static uint8_t bmi160_emul_reg_##n[BMI160_REG_COUNT]; \
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static struct bmi160_emul_data bmi160_emul_data_##n;
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#define BMI160_EMUL_DEFINE(n, api) \
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EMUL_DEFINE(emul_bosch_bmi160_init, DT_DRV_INST(n), &bmi160_emul_cfg_##n, \
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&bmi160_emul_data_##n, &api)
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/* Instantiation macros used when a device is on a SPI bus */
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#define BMI160_EMUL_SPI(n) \
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BMI160_EMUL_DATA(n) \
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static const struct bmi160_emul_cfg bmi160_emul_cfg_##n = { .bus_label = \
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DT_INST_BUS_LABEL(n), \
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.reg = bmi160_emul_reg_##n, \
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.chipsel = \
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DT_INST_REG_ADDR(n) }; \
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BMI160_EMUL_DEFINE(n, bmi160_emul_api_spi)
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#define BMI160_EMUL_I2C(n) \
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BMI160_EMUL_DATA(n) \
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static const struct bmi160_emul_cfg bmi160_emul_cfg_##n = { .bus_label = \
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DT_INST_BUS_LABEL(n), \
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.reg = bmi160_emul_reg_##n, \
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.addr = DT_INST_REG_ADDR(n) }; \
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BMI160_EMUL_DEFINE(n, bmi160_emul_api_i2c)
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/*
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* Main instantiation macro. Use of COND_CODE_1() selects the right
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* bus-specific macro at preprocessor time.
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*/
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#define BMI160_EMUL(n) \
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COND_CODE_1(DT_INST_ON_BUS(n, spi), (BMI160_EMUL_SPI(n)), (BMI160_EMUL_I2C(n)))
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DT_INST_FOREACH_STATUS_OKAY(BMI160_EMUL)
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