bc41234104
This is a driver for the Synopsys DesignWare MAC. It should work with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x and 5.x. This driver uses a zero-copy strategy, meaning that the hardware reads and writes data directly from/to packet fragment buffers provided by the network subsystem without first copying the data into a dedicated DMA bounce buffer. Platform specific setup is necessary for the hardware to work. Currently, only the STM32H7X series is implemented and tested. While this part needs refinement, this driver performs better and uses far less code space than the HAL-based alternative. Not yet implemented: - MDIO (it is WIP, currently relying on default PHY config) - PTP support - VLAN support - various hardware offloads (when available) Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
100 lines
2.5 KiB
C
100 lines
2.5 KiB
C
/*
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* Driver for Synopsys DesignWare MAC
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*
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* Copyright (c) 2021 BayLibre SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define LOG_MODULE_NAME dwmac_plat
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#define LOG_LEVEL CONFIG_ETHERNET_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(LOG_MODULE_NAME);
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#define DT_DRV_COMPAT snps_designware_ethernet
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#include <sys/types.h>
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#include <sys/mem_manage.h>
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#include <zephyr.h>
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#include <cache.h>
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#include <net/ethernet.h>
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#include "eth_dwmac_priv.h"
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int dwmac_bus_init(struct dwmac_priv *p)
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{
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p->base_addr = DT_INST_REG_ADDR(0);
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return 0;
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}
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#if (CONFIG_DCACHE_LINE_SIZE+0 == 0)
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#error "CONFIG_DCACHE_LINE_SIZE must be configured to a non-zero value"
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#endif
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static struct dwmac_dma_desc __aligned(CONFIG_DCACHE_LINE_SIZE)
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dwmac_tx_rx_descriptors[NB_TX_DESCS + NB_RX_DESCS];
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static const uint8_t dwmac_mac_addr[6] = DT_INST_PROP(0, local_mac_address);
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void dwmac_platform_init(struct dwmac_priv *p)
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{
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uint8_t *desc_uncached_addr;
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uintptr_t desc_phys_addr;
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/* make sure no valid cache lines map to the descriptor area */
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sys_cache_data_range(dwmac_tx_rx_descriptors,
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sizeof(dwmac_tx_rx_descriptors),
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K_CACHE_INVD);
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desc_phys_addr = z_mem_phys_addr(dwmac_tx_rx_descriptors);
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/* remap descriptor rings uncached */
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z_phys_map(&desc_uncached_addr, desc_phys_addr,
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sizeof(dwmac_tx_rx_descriptors),
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K_MEM_PERM_RW | K_MEM_CACHE_NONE);
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LOG_DBG("desc virt %p uncached %p phys 0x%lx",
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dwmac_tx_rx_descriptors, desc_uncached_addr, desc_phys_addr);
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p->tx_descs = (void *)desc_uncached_addr;
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desc_uncached_addr += NB_TX_DESCS * sizeof(struct dwmac_dma_desc);
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p->rx_descs = (void *)desc_uncached_addr;
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p->tx_descs_phys = desc_phys_addr;
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desc_phys_addr += NB_TX_DESCS * sizeof(struct dwmac_dma_desc);
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p->rx_descs_phys = desc_phys_addr;
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/* basic configuration for this platform */
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REG_WRITE(MAC_CONF,
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MAC_CONF_PS |
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MAC_CONF_FES |
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MAC_CONF_DM);
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REG_WRITE(DMA_SYSBUS_MODE,
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DMA_SYSBUS_MODE_AAL |
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#ifdef CONFIG_64BIT
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DMA_SYSBUS_MODE_EAME |
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#endif
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DMA_SYSBUS_MODE_FB);
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/* set up IRQs (still masked for now) */
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IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), dwmac_isr,
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DEVICE_DT_INST_GET(0), 0);
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irq_enable(DT_INST_IRQN(0));
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/* retrieve MAC address */
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memcpy(p->mac_addr, dwmac_mac_addr, sizeof(p->mac_addr));
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}
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/* Our private device instance */
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static struct dwmac_priv dwmac_instance;
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ETH_NET_DEVICE_DT_INST_DEFINE(0,
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dwmac_probe,
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NULL,
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&dwmac_instance,
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NULL,
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CONFIG_ETH_INIT_PRIORITY,
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&dwmac_api,
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NET_ETH_MTU);
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