zephyr/soc/xtensa
Lucas Tamborrino ff62faac07 soc: xtensa: esp32s2/s3: remove HEAP_MEM_POOL_ADD_SIZE_SOC
There is no need for this config here and it is messing
with total sys heap calculation.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-12-27 10:08:47 +02:00
..
dc233c soc: xtensa/dc233c: turn on i-cache and d-cache 2023-12-18 12:25:04 +01:00
espressif_esp32 soc: xtensa: esp32s2/s3: remove HEAP_MEM_POOL_ADD_SIZE_SOC 2023-12-27 10:08:47 +02:00
intel_adsp intel_adsp: lnl: add missing definition for lnl 2023-12-14 22:22:22 +09:00
nxp_adsp xtensa: rename z_xtensa_irq to simple xtensa_irq 2023-12-13 09:41:24 +01:00
sample_controller cmake: cleanup and simplify the standard include logic in Zephyr 2023-11-06 18:57:30 -05:00
CMakeLists.txt soc/xtensa/intel_adsp: Upstream updates 2020-10-21 06:38:53 -04:00