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zephyr/tests/posix/common/testcase.yaml

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tests: posix: add newlib cfg option Add a build variant of the posix tests with newlib enabled. Since the interation of posix is greatly related to the libc we should have these tests build with and without newlib support. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-19 23:39:17 +01:00
common:
tests: posix: shorten the filter in testcase.yaml CONFIG_NATIVE_LIBC can be used in place of CONFIG_NATIVE_BUILD and CONFIG_EXTERNAL_LIBC Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2024-01-15 23:38:58 +01:00
filter: not CONFIG_NATIVE_LIBC
tests/posix/common: Fix filtering for POSIX arch All these tests where filtered for the whole POSIX architecture, but quite a few of them can be run in native_sim. So let's filter out native_posix(_64) in general, (allowing other native simulator based targes), and filter for thsi arch out explicitly the 2 tests which need NEWLIB as this arch does not provide it. Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-10-23 13:27:37 +02:00
platform_exclude:
- native_posix
- native_posix_64
tests: posix: add newlib cfg option Add a build variant of the posix tests with newlib enabled. Since the interation of posix is greatly related to the libc we should have these tests build with and without newlib support. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-19 23:39:17 +01:00
tags: posix
min_ram: 64
tests: samples: revert timeout change for FVP BaseR Partially revert commit 0028e9733295316d152eba07bf56677d83f4b1b5. Timeout for tests/posix/common must be still increased for slow platforms (previously was 120 sec). Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-07-13 20:36:03 +02:00
timeout: 240
tests: posix: mqueue: Add test for posix message queue APIs. Added new test for message queue APIs. Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2018-03-19 18:00:00 +01:00
tests:
tests: updated names for the tests Some test cases have the same test case name. To get rid of it, I decided to change test cases names contained same names. Please check my logic, how I give them names. Usually trying to give name same as a directory folder. There are still more test cases which necessary to change, but I will make changes by small steps. Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
2019-10-22 08:32:33 +02:00
portability.posix.common:
samples, tests: convert string-based twister lists to YAML lists Twister now supports using YAML lists for all fields that were written as space-separated lists. Used twister_to_list.py script. Some artifacts on string length are due to how ruamel dumps content. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-08 13:37:42 +02:00
platform_exclude:
- nsim_sem_mpu_stack_guard
boards: x86: Add intel_ prefix to Elkhart Lake boards This follows the same convention that has already been adopted by Intel Alder Lake and Raptor Lake boards. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2023-08-14 13:39:34 +02:00
- intel_ehl_crb
tests: posix: add newlib cfg option Add a build variant of the posix tests with newlib enabled. Since the interation of posix is greatly related to the libc we should have these tests build with and without newlib support. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-19 23:39:17 +01:00
extra_configs:
- CONFIG_NEWLIB_LIBC=n
tests: use integration_platforms where applicable Use integration_platforms where coverage is provided using one or few targets instead. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-05-25 16:38:25 +02:00
integration_platforms:
- qemu_x86
tests: updated names for the tests Some test cases have the same test case name. To get rid of it, I decided to change test cases names contained same names. Please check my logic, how I give them names. Usually trying to give name same as a directory folder. There are still more test cases which necessary to change, but I will make changes by small steps. Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
2019-10-22 08:32:33 +02:00
portability.posix.common.newlib:
samples, tests: convert string-based twister lists to YAML lists Twister now supports using YAML lists for all fields that were written as space-separated lists. Used twister_to_list.py script. Some artifacts on string length are due to how ruamel dumps content. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-08 13:37:42 +02:00
platform_exclude:
- nsim_sem_mpu_stack_guard
boards: x86: Add intel_ prefix to Elkhart Lake boards This follows the same convention that has already been adopted by Intel Alder Lake and Raptor Lake boards. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2023-08-14 13:39:34 +02:00
- intel_ehl_crb
samples, tests: convert string-based twister lists to YAML lists Twister now supports using YAML lists for all fields that were written as space-separated lists. Used twister_to_list.py script. Some artifacts on string length are due to how ruamel dumps content. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-08 13:37:42 +02:00
- lpcxpresso55s06
tests: posix: add newlib cfg option Add a build variant of the posix tests with newlib enabled. Since the interation of posix is greatly related to the libc we should have these tests build with and without newlib support. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-19 23:39:17 +01:00
filter: TOOLCHAIN_HAS_NEWLIB == 1
extra_configs:
- CONFIG_NEWLIB_LIBC=y
tests/posix/common: Fix filtering for POSIX arch All these tests where filtered for the whole POSIX architecture, but quite a few of them can be run in native_sim. So let's filter out native_posix(_64) in general, (allowing other native simulator based targes), and filter for thsi arch out explicitly the 2 tests which need NEWLIB as this arch does not provide it. Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-10-23 13:27:37 +02:00
arch_exclude:
- posix
tests: use integration_platforms where applicable Use integration_platforms where coverage is provided using one or few targets instead. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-05-25 16:38:25 +02:00
integration_platforms:
- qemu_x86
tests: posix: common: Add testcase for arm-clang Add a testcase variant to cover building with arm-clang and CONFIG_ARMCLANG_STD_LIBC set. Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2023-04-04 15:35:05 +02:00
portability.posix.common.armclang_std_libc:
toolchain_allow: armclang
extra_configs:
- CONFIG_ARMCLANG_STD_LIBC=y
tests: posix: common: add option to build with arcmwdt libc Add testcase to tests/posix/common with ARC MWDT libc usage. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-06-03 13:37:10 +02:00
portability.posix.common.arcmwdtlib:
toolchain_allow: arcmwdt
extra_configs:
- CONFIG_ARCMWDT_LIBC=y
tests: posix/{common,fs}: enable testing TLS Enable additional test cases for thread local storage, as these tests use errno. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-06 01:06:09 +02:00
portability.posix.common.tls:
samples, tests: convert string-based twister lists to YAML lists Twister now supports using YAML lists for all fields that were written as space-separated lists. Used twister_to_list.py script. Some artifacts on string length are due to how ruamel dumps content. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-08 13:37:42 +02:00
platform_exclude:
- nsim_sem_mpu_stack_guard
boards: x86: Add intel_ prefix to Elkhart Lake boards This follows the same convention that has already been adopted by Intel Alder Lake and Raptor Lake boards. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2023-08-14 13:39:34 +02:00
- intel_ehl_crb
tests: tls: add toolchain filter tls rely on both arch has tls and toolchain support tls, add filter: CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE for some tests enabled tls. Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2020-12-14 06:26:37 +01:00
filter: CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE and CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE
tests: posix/{common,fs}: enable testing TLS Enable additional test cases for thread local storage, as these tests use errno. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-06 01:06:09 +02:00
extra_configs:
- CONFIG_NEWLIB_LIBC=n
- CONFIG_THREAD_LOCAL_STORAGE=y
tests: use integration_platforms where applicable Use integration_platforms where coverage is provided using one or few targets instead. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-05-25 16:38:25 +02:00
integration_platforms:
- qemu_x86
tests: posix/{common,fs}: enable testing TLS Enable additional test cases for thread local storage, as these tests use errno. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-06 01:06:09 +02:00
portability.posix.common.tls.newlib:
samples, tests: convert string-based twister lists to YAML lists Twister now supports using YAML lists for all fields that were written as space-separated lists. Used twister_to_list.py script. Some artifacts on string length are due to how ruamel dumps content. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-08 13:37:42 +02:00
platform_exclude:
- nsim_sem_mpu_stack_guard
boards: x86: Add intel_ prefix to Elkhart Lake boards This follows the same convention that has already been adopted by Intel Alder Lake and Raptor Lake boards. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2023-08-14 13:39:34 +02:00
- intel_ehl_crb
samples, tests: convert string-based twister lists to YAML lists Twister now supports using YAML lists for all fields that were written as space-separated lists. Used twister_to_list.py script. Some artifacts on string length are due to how ruamel dumps content. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-08 13:37:42 +02:00
- lpcxpresso55s06
yamllint: fix all yamllint line-length errors Fix all line-length errors detected by yamllint: yamllint -f parsable -c .yamllint $( find -regex '.*\.y[a]*ml' ) | \ grep '(line-length)' Using a limit is set to 100 columns, not touching the commandlines in GitHub workflows (at least for now). Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-03 14:08:30 +01:00
filter: TOOLCHAIN_HAS_NEWLIB == 1 and CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE and
CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE
tests/posix/common: Fix filtering for POSIX arch All these tests where filtered for the whole POSIX architecture, but quite a few of them can be run in native_sim. So let's filter out native_posix(_64) in general, (allowing other native simulator based targes), and filter for thsi arch out explicitly the 2 tests which need NEWLIB as this arch does not provide it. Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-10-23 13:27:37 +02:00
arch_exclude:
- posix
tests: use integration_platforms where applicable Use integration_platforms where coverage is provided using one or few targets instead. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-05-25 16:38:25 +02:00
integration_platforms:
- qemu_x86
tests: posix/{common,fs}: enable testing TLS Enable additional test cases for thread local storage, as these tests use errno. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-06 01:06:09 +02:00
extra_configs:
- CONFIG_NEWLIB_LIBC=y
- CONFIG_THREAD_LOCAL_STORAGE=y
tests: updated names for the tests Some test cases have the same test case name. To get rid of it, I decided to change test cases names contained same names. Please check my logic, how I give them names. Usually trying to give name same as a directory folder. There are still more test cases which necessary to change, but I will make changes by small steps. Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
2019-10-22 08:32:33 +02:00
portability.posix.common.nsim:
tests: fix typos and misnamed platforms Various obsolote and misnamed platfomrs in test filters theat went undetected for a while. Fixes #41222 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-12-15 16:48:35 +01:00
platform_allow: nsim_sem_mpu_stack_guard
tests: add nsim special cases for two tests The NSIM emulator has severe performance issues when the MPU registers are reprogrammed on context switch. Disable runtime reprogramming of the MPU for these platforms on these two tests, which have a lot of context switch thrashing. This is done by ensuring userspace and hardware stack overflow detection via guard areas is disabled. I have assurances from the ARC team that the tests run fine on real hardware and this is an emulation issue. For 1.15, this will be completely resolved by optimizing MPU region gap-filling to not take place during context switch time, which will drastically reduce the number of MPU registers poked during context switch on nsim_sem. Meanwhile, for 1.14 we ensure that no runtime reprogramming of the MPU is done for these tests. Fixes: #14642 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-04-08 23:47:09 +02:00
extra_configs:
- CONFIG_NEWLIB_LIBC=n
- CONFIG_TEST_HW_STACK_PROTECTION=n
tests: updated names for the tests Some test cases have the same test case name. To get rid of it, I decided to change test cases names contained same names. Please check my logic, how I give them names. Usually trying to give name same as a directory folder. There are still more test cases which necessary to change, but I will make changes by small steps. Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
2019-10-22 08:32:33 +02:00
portability.posix.common.newlib.nsim:
tests: fix typos and misnamed platforms Various obsolote and misnamed platfomrs in test filters theat went undetected for a while. Fixes #41222 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-12-15 16:48:35 +01:00
platform_allow: nsim_sem_mpu_stack_guard
tests: add nsim special cases for two tests The NSIM emulator has severe performance issues when the MPU registers are reprogrammed on context switch. Disable runtime reprogramming of the MPU for these platforms on these two tests, which have a lot of context switch thrashing. This is done by ensuring userspace and hardware stack overflow detection via guard areas is disabled. I have assurances from the ARC team that the tests run fine on real hardware and this is an emulation issue. For 1.15, this will be completely resolved by optimizing MPU region gap-filling to not take place during context switch time, which will drastically reduce the number of MPU registers poked during context switch on nsim_sem. Meanwhile, for 1.14 we ensure that no runtime reprogramming of the MPU is done for these tests. Fixes: #14642 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-04-08 23:47:09 +02:00
filter: TOOLCHAIN_HAS_NEWLIB == 1
extra_configs:
- CONFIG_NEWLIB_LIBC=y
- CONFIG_TEST_HW_STACK_PROTECTION=n
tests: Add picolibc tests This adds picolibc-specific configurations for a couple of tests Signed-off-by: Keith Packard <keithp@keithp.com>
2022-04-07 00:55:39 +02:00
portability.posix.common.picolibc:
tags: picolibc
filter: CONFIG_PICOLIBC_SUPPORTED
tests: use integration_platforms where applicable Use integration_platforms where coverage is provided using one or few targets instead. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-05-25 16:38:25 +02:00
integration_platforms:
- qemu_x86
tests: Add picolibc tests This adds picolibc-specific configurations for a couple of tests Signed-off-by: Keith Packard <keithp@keithp.com>
2022-04-07 00:55:39 +02:00
extra_configs:
- CONFIG_PICOLIBC=y
tests: posix: common: add pthread spinlock tests Exercise the following (which rely mainly on existing Zephyr utilities) * `pthread_spin_init()` * `pthread_spin_destroy()` * `pthread_spin_lock()` * `pthread_spin_trylock()` * `pthread_spin_unlock()` Additionally, ensure that we do not leak spinlock descriptors. Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-07-02 19:41:29 +02:00
portability.posix.common.no_spin_validate:
extra_configs:
- CONFIG_SPIN_VALIDATE=n
integration_platforms:
- mps2_an385
posix: signal: implement strsignal Implementation and ztest for strsignal. Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-07-10 19:14:25 +02:00
portability.posix.common.signal.strsignal_no_desc:
extra_configs:
- CONFIG_POSIX_SIGNAL_STRING_DESC=n
test: posix: signal: add test for big nsig number Add an extra test config to test large number of signals. Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-07-14 07:23:37 +02:00
portability.posix.common.signal.big_nsig:
extra_configs:
- CONFIG_POSIX_RTSIG_MAX=1024
pthread: test: facilitate dynamically allocated thread stacks Tests for dynamically allocated POSIX thread stacks. Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-02-10 15:17:59 +01:00
portability.posix.common.dynamic_stack:
integration_platforms:
- qemu_x86
- qemu_riscv64
extra_configs:
- CONFIG_DYNAMIC_THREAD=y
- CONFIG_THREAD_STACK_INFO=y
- CONFIG_DYNAMIC_THREAD_POOL_SIZE=5
- CONFIG_HEAP_MEM_POOL_SIZE=16384
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