zephyr/arch/Kconfig

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# Kconfig - general architecture configuration options
#
# Copyright (c) 2014-2015 Wind River Systems, Inc.
# Copyright (c) 2015 Intel Corporation
# Copyright (c) 2016 Cadence Design Systems, Inc.
#
# SPDX-License-Identifier: Apache-2.0
#
Kconfig: Use the first default with a satisfied condition Up until now, Zephyr has patched Kconfig to use the last 'default' with a satisfied condition, instead of the first one. I'm not sure why the patch was added (it predates Kconfiglib), but I suspect it's related to Kconfig.defconfig files. There are at least three problems with the patch: 1. It's inconsistent with how Kconfig works in other projects, which might confuse newcomers. 2. Due to oversights, earlier 'range' properties are still preferred, as well as earlier 'default' properties on choices. In addition to being inconsistent, this makes it impossible to override 'range' properties and choice 'default' properties if the base definition of the symbol/choice already has 'range'/'default' properties. I've seen errors caused by the inconsistency, and I suspect there are more. 3. A fork of Kconfiglib that adds the patch needs to be maintained. Get rid of the patch and go back to standard Kconfig behavior, as follows: 1. Include the Kconfig.defconfig files first instead of last in Kconfig.zephyr. 2. Include boards/Kconfig and arch/<arch>/Kconfig first instead of last in arch/Kconfig. 3. Include arch/<arch>/soc/*/Kconfig first instead of last in arch/<arch>/Kconfig. 4. Swap a few other 'source's to preserve behavior for some scattered symbols with multiple definitions. Swap 'source's in some no-op cases too, where it might match the intent. 5. Reverse the defaults on symbol definitions that have more than one default. Skip defaults that are mutually exclusive, e.g. where each default has an 'if <some board>' condition. They are already safe. 6. Remove the prefer-later-defaults patch from Kconfiglib. Testing was done with a Python script that lists all Kconfig symbols/choices with multiple defaults, along with a whitelist of fixed symbols. The script also verifies that there are no "unreachable" defaults hidden by defaults without conditions As an additional test, zephyr/.config was generated before and after the change for several samples and checked to be identical (after sorting). This commit includes some default-related cleanups as well: - Simplify some symbol definitions, e.g. where a default has 'if FOO' when the symbol already has 'depends on FOO'. - Remove some redundant 'default ""' for string symbols. This is the implicit default. Piggyback fixes for swapped ranges on BT_L2CAP_RX_MTU and BT_L2CAP_TX_MTU (caused by confusing inconsistency). Piggyback some fixes for style nits too, e.g. unindented help texts. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-30 10:57:47 +02:00
# Include these first so that any properties (e.g. defaults) below can be
# overriden (by defining symbols in multiple locations)
# Note: $ARCH might be a glob pattern
source "$(ARCH_DIR)/$(ARCH)/Kconfig"
Kconfig: Use the first default with a satisfied condition Up until now, Zephyr has patched Kconfig to use the last 'default' with a satisfied condition, instead of the first one. I'm not sure why the patch was added (it predates Kconfiglib), but I suspect it's related to Kconfig.defconfig files. There are at least three problems with the patch: 1. It's inconsistent with how Kconfig works in other projects, which might confuse newcomers. 2. Due to oversights, earlier 'range' properties are still preferred, as well as earlier 'default' properties on choices. In addition to being inconsistent, this makes it impossible to override 'range' properties and choice 'default' properties if the base definition of the symbol/choice already has 'range'/'default' properties. I've seen errors caused by the inconsistency, and I suspect there are more. 3. A fork of Kconfiglib that adds the patch needs to be maintained. Get rid of the patch and go back to standard Kconfig behavior, as follows: 1. Include the Kconfig.defconfig files first instead of last in Kconfig.zephyr. 2. Include boards/Kconfig and arch/<arch>/Kconfig first instead of last in arch/Kconfig. 3. Include arch/<arch>/soc/*/Kconfig first instead of last in arch/<arch>/Kconfig. 4. Swap a few other 'source's to preserve behavior for some scattered symbols with multiple definitions. Swap 'source's in some no-op cases too, where it might match the intent. 5. Reverse the defaults on symbol definitions that have more than one default. Skip defaults that are mutually exclusive, e.g. where each default has an 'if <some board>' condition. They are already safe. 6. Remove the prefer-later-defaults patch from Kconfiglib. Testing was done with a Python script that lists all Kconfig symbols/choices with multiple defaults, along with a whitelist of fixed symbols. The script also verifies that there are no "unreachable" defaults hidden by defaults without conditions As an additional test, zephyr/.config was generated before and after the change for several samples and checked to be identical (after sorting). This commit includes some default-related cleanups as well: - Simplify some symbol definitions, e.g. where a default has 'if FOO' when the symbol already has 'depends on FOO'. - Remove some redundant 'default ""' for string symbols. This is the implicit default. Piggyback fixes for swapped ranges on BT_L2CAP_RX_MTU and BT_L2CAP_TX_MTU (caused by confusing inconsistency). Piggyback some fixes for style nits too, e.g. unindented help texts. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-30 10:57:47 +02:00
choice
prompt "Architecture"
default X86
config ARC
bool "ARC architecture"
select HAS_DTS
config ARM
bool "ARM architecture"
select ARCH_HAS_THREAD_ABORT
select HAS_DTS
config X86
bool "x86 architecture"
select ATOMIC_OPERATIONS_BUILTIN
select HAS_DTS
arch/x86_64: New architecture added This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr. Only the basic architecture support needed to run 64 bit code is added; no drivers are added, though a low-level console exists and is wired to printk(). The support is built on top of a "X86 underkernel" layer, which can be built in isolation as a unit test on a Linux host. Limitations: + Right now the SDK lacks an x86_64 toolchain. The build will fall back to a host toolchain if it finds no cross compiler defined, which is tested to work on gcc 8.2.1 right now. + No x87/SSE/AVX usage is allowed. This is a stronger limitation than other architectures where the instructions work from one thread even if the context switch code doesn't support it. We are passing -no-sse to prevent gcc from automatically generating SSE instructions for non-floating-point purposes, which has the side effect of changing the ABI. Future work to handle the FPU registers will need to be combined with an "application" ABI distinct from the kernel one (or just to require USERSPACE). + Paging is enabled (it has to be in long mode), but is a 1:1 mapping of all memory. No MMU/USERSPACE support yet. + We are building with -mno-red-zone for stack size reasons, but this is a valuable optimization. Enabling it requires automatic stack switching, which requires a TSS, which means it has to happen after MMU support. + The OS runs in 64 bit mode, but for compatibility reasons is compiled to the 32 bit "X32" ABI. So while the full 64 bit registers and instruction set are available, C pointers are 32 bits long and Zephyr is constrained to run in the bottom 4G of memory. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-08-19 21:24:48 +02:00
config X86_64
bool "x86_64 architecture"
select ATOMIC_OPERATIONS_BUILTIN
select SCHED_IPI_SUPPORTED
arch/x86_64: New architecture added This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr. Only the basic architecture support needed to run 64 bit code is added; no drivers are added, though a low-level console exists and is wired to printk(). The support is built on top of a "X86 underkernel" layer, which can be built in isolation as a unit test on a Linux host. Limitations: + Right now the SDK lacks an x86_64 toolchain. The build will fall back to a host toolchain if it finds no cross compiler defined, which is tested to work on gcc 8.2.1 right now. + No x87/SSE/AVX usage is allowed. This is a stronger limitation than other architectures where the instructions work from one thread even if the context switch code doesn't support it. We are passing -no-sse to prevent gcc from automatically generating SSE instructions for non-floating-point purposes, which has the side effect of changing the ABI. Future work to handle the FPU registers will need to be combined with an "application" ABI distinct from the kernel one (or just to require USERSPACE). + Paging is enabled (it has to be in long mode), but is a 1:1 mapping of all memory. No MMU/USERSPACE support yet. + We are building with -mno-red-zone for stack size reasons, but this is a valuable optimization. Enabling it requires automatic stack switching, which requires a TSS, which means it has to happen after MMU support. + The OS runs in 64 bit mode, but for compatibility reasons is compiled to the 32 bit "X32" ABI. So while the full 64 bit registers and instruction set are available, C pointers are 32 bits long and Zephyr is constrained to run in the bottom 4G of memory. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-08-19 21:24:48 +02:00
config NIOS2
bool "Nios II Gen 2 architecture"
select ATOMIC_OPERATIONS_C
select HAS_DTS
arch: added support for the riscv32 architecture RISC-V is an open-source instruction set architecture. Added support for the 32bit version of RISC-V to Zephyr. 1) exceptions/interrupts/faults are handled at the architecture level via the __irq_wrapper handler. Context saving/restoring of registers can be handled at both architecture and SOC levels. If SOC-specific registers need to be saved, SOC level needs to provide __soc_save_context and __soc_restore_context functions that shall be accounted by the architecture level, when corresponding config variable RISCV_SOC_CONTEXT_SAVE is set. 2) As RISC-V architecture does not provide a clear ISA specification about interrupt handling, each RISC-V SOC handles it in its own way. Hence, at the architecture level, the __irq_wrapper handler expects the following functions to be provided by the SOC level: __soc_is_irq: to check if the exception is the result of an interrupt or not. __soc_handle_irq: handle pending IRQ at SOC level (ex: clear pending IRQ in SOC-specific IRQ register) 3) Thread/task scheduling, as well as IRQ offloading are handled via the RISC-V system call ("ecall"), which is also handled via the __irq_wrapper handler. The _Swap asm function just calls "ecall" to generate an exception. 4) As there is no conventional way of handling CPU power save in RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle functions just unlock interrupts and return to the caller, without issuing any CPU power saving instruction. Nonetheless, to allow SOC-level to implement proper CPU power save, nano_cpu_idle and nano_cpu_atomic_idle functions are defined as __weak at the architecture level. Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-11 00:24:30 +01:00
config RISCV32
bool "RISCV32 architecture"
select HAS_DTS
arch: added support for the riscv32 architecture RISC-V is an open-source instruction set architecture. Added support for the 32bit version of RISC-V to Zephyr. 1) exceptions/interrupts/faults are handled at the architecture level via the __irq_wrapper handler. Context saving/restoring of registers can be handled at both architecture and SOC levels. If SOC-specific registers need to be saved, SOC level needs to provide __soc_save_context and __soc_restore_context functions that shall be accounted by the architecture level, when corresponding config variable RISCV_SOC_CONTEXT_SAVE is set. 2) As RISC-V architecture does not provide a clear ISA specification about interrupt handling, each RISC-V SOC handles it in its own way. Hence, at the architecture level, the __irq_wrapper handler expects the following functions to be provided by the SOC level: __soc_is_irq: to check if the exception is the result of an interrupt or not. __soc_handle_irq: handle pending IRQ at SOC level (ex: clear pending IRQ in SOC-specific IRQ register) 3) Thread/task scheduling, as well as IRQ offloading are handled via the RISC-V system call ("ecall"), which is also handled via the __irq_wrapper handler. The _Swap asm function just calls "ecall" to generate an exception. 4) As there is no conventional way of handling CPU power save in RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle functions just unlock interrupts and return to the caller, without issuing any CPU power saving instruction. Nonetheless, to allow SOC-level to implement proper CPU power save, nano_cpu_idle and nano_cpu_atomic_idle functions are defined as __weak at the architecture level. Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-11 00:24:30 +01:00
config XTENSA
bool "Xtensa architecture"
select HAS_DTS
config ARCH_POSIX
bool "POSIX (native) architecture"
select ATOMIC_OPERATIONS_BUILTIN
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select ARCH_HAS_CUSTOM_BUSY_WAIT
select ARCH_HAS_THREAD_ABORT
select NATIVE_APPLICATION
select HAS_COVERAGE_SUPPORT
endchoice
menu "General Architecture Options"
module = ARCH
module-str = arch
source "subsys/logging/Kconfig.template.log_config"
module = MPU
module-str = mpu
source "subsys/logging/Kconfig.template.log_config"
config BIG_ENDIAN
bool
help
This option tells the build system that the target system is
big-endian. Little-endian architecture is the default and
should leave this option unselected. This option is selected
by arch/$ARCH/Kconfig, soc/**/Kconfig, or boards/**/Kconfig
and the user should generally avoid modifying it. The option
is used to select linker script OUTPUT_FORMAT and command
line option for gen_isr_tables.py.
if ARC || ARM || NIOS2 || X86
config SRAM_SIZE
int "SRAM Size in kB"
default $(dt_int_val,DT_SRAM_SIZE)
help
This option specifies the size of the SRAM in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config SRAM_BASE_ADDRESS
hex "SRAM Base Address"
default $(dt_hex_val,DT_SRAM_BASE_ADDRESS)
help
This option specifies the base address of the SRAM on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config FLASH_SIZE
int "Flash Size in kB"
default $(dt_int_val,DT_FLASH_SIZE) if (XIP && ARM) || !ARM
help
This option specifies the size of the flash in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config FLASH_BASE_ADDRESS
hex "Flash Base Address"
default $(dt_hex_val,DT_FLASH_BASE_ADDRESS) if (XIP && ARM) || !ARM
help
This option specifies the base address of the flash on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
endif # ARM || ARC || NIOS2 || X86
if ARCH_HAS_TRUSTED_EXECUTION
config TRUSTED_EXECUTION_SECURE
bool "Trusted Execution: Secure firmware image"
help
Select this option to enable building a Secure firmware
image for a platform that supports Trusted Execution. A
Secure firmware image will execute in Secure state. It may
allow the CPU to execute in Non-Secure (Normal) state.
Therefore, a Secure firmware image shall be able to
configure security attributions of CPU resources (memory
areas, peripherals, interrupts, etc.) as well as to handle
faults, related to security violations. It may optionally
allow certain functions to be called from the Non-Secure
(Normal) domain.
config TRUSTED_EXECUTION_NONSECURE
depends on !TRUSTED_EXECUTION_SECURE
bool "Trusted Execution: Non-Secure firmware image"
help
Select this option to enable building a Non-Secure
firmware image for a platform that supports Trusted
Execution. A Non-Secure firmware image will execute
in Non-Secure (Normal) state. Therefore, it shall not
access CPU resources (memory areas, peripherals,
interrupts etc.) belonging to the Secure domain.
endif # ARCH_HAS_TRUSTED_EXECUTION
config HW_STACK_PROTECTION
bool "Hardware Stack Protection"
depends on ARCH_HAS_STACK_PROTECTION
help
Select this option to enable hardware-based platform features to
catch stack overflows when the system is running in privileged
mode. If CONFIG_USERSPACE is not enabled, the system is always
running in privileged mode.
Note that this does not necessarily prevent corruption and assertions
about the overall system state when a fault is triggered cannot be
made.
config USERSPACE
bool "User mode threads"
depends on ARCH_HAS_USERSPACE
help
When enabled, threads may be created or dropped down to user mode,
which has significantly restricted permissions and must interact
with the kernel via system calls. See Zephyr documentation for more
details about this feature.
If a user thread overflows its stack, this will be caught and the
kernel itself will be shielded from harm. Enabling this option
may or may not catch stack overflows when the system is in
privileged mode or handling a system call; to ensure these are always
caught, enable CONFIG_HW_STACK_PROTECTION.
config PRIVILEGED_STACK_SIZE
int "Size of privileged stack"
default 512 if MPU_STACK_GUARD || BUILTIN_STACK_GUARD
default 512 if COVERAGE_GCOV
default 384 if ARC
Kconfig: Use the first default with a satisfied condition Up until now, Zephyr has patched Kconfig to use the last 'default' with a satisfied condition, instead of the first one. I'm not sure why the patch was added (it predates Kconfiglib), but I suspect it's related to Kconfig.defconfig files. There are at least three problems with the patch: 1. It's inconsistent with how Kconfig works in other projects, which might confuse newcomers. 2. Due to oversights, earlier 'range' properties are still preferred, as well as earlier 'default' properties on choices. In addition to being inconsistent, this makes it impossible to override 'range' properties and choice 'default' properties if the base definition of the symbol/choice already has 'range'/'default' properties. I've seen errors caused by the inconsistency, and I suspect there are more. 3. A fork of Kconfiglib that adds the patch needs to be maintained. Get rid of the patch and go back to standard Kconfig behavior, as follows: 1. Include the Kconfig.defconfig files first instead of last in Kconfig.zephyr. 2. Include boards/Kconfig and arch/<arch>/Kconfig first instead of last in arch/Kconfig. 3. Include arch/<arch>/soc/*/Kconfig first instead of last in arch/<arch>/Kconfig. 4. Swap a few other 'source's to preserve behavior for some scattered symbols with multiple definitions. Swap 'source's in some no-op cases too, where it might match the intent. 5. Reverse the defaults on symbol definitions that have more than one default. Skip defaults that are mutually exclusive, e.g. where each default has an 'if <some board>' condition. They are already safe. 6. Remove the prefer-later-defaults patch from Kconfiglib. Testing was done with a Python script that lists all Kconfig symbols/choices with multiple defaults, along with a whitelist of fixed symbols. The script also verifies that there are no "unreachable" defaults hidden by defaults without conditions As an additional test, zephyr/.config was generated before and after the change for several samples and checked to be identical (after sorting). This commit includes some default-related cleanups as well: - Simplify some symbol definitions, e.g. where a default has 'if FOO' when the symbol already has 'depends on FOO'. - Remove some redundant 'default ""' for string symbols. This is the implicit default. Piggyback fixes for swapped ranges on BT_L2CAP_RX_MTU and BT_L2CAP_TX_MTU (caused by confusing inconsistency). Piggyback some fixes for style nits too, e.g. unindented help texts. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-30 10:57:47 +02:00
default 256
depends on ARCH_HAS_USERSPACE
help
This option sets the privileged stack region size that will be used
in addition to the user mode thread stack. During normal execution,
this region will be inaccessible from user mode. During system calls,
this region will be utilized by the system call.
config PRIVILEGED_STACK_TEXT_AREA
int "Privileged stacks text area"
default 512 if COVERAGE_GCOV
default 256
depends on ARCH_HAS_USERSPACE
help
Stack text area size for privileged stacks.
config KOBJECT_TEXT_AREA
int "Size if kobject text area"
default 512 if COVERAGE_GCOV
default 512 if NO_OPTIMIZATIONS
default 256
depends on ARCH_HAS_USERSPACE
help
Size of kernel object text area. Used in linker script.
config STACK_GROWS_UP
bool "Stack grows towards higher memory addresses"
help
Select this option if the architecture has upward growing thread
stacks. This is not common.
config MAX_THREAD_BYTES
int "Bytes to use when tracking object thread permissions"
default 2
depends on USERSPACE
help
Every kernel object will have an associated bitfield to store
thread permissions for that object. This controls the size of the
bitfield (in bytes) and imposes a limit on how many threads can
be created in the system.
config DYNAMIC_OBJECTS
bool "Allow kernel objects to be allocated at runtime"
depends on USERSPACE
help
Enabling this option allows for kernel objects to be requested from
the calling thread's resource pool, at a slight cost in performance
due to the supplemental run-time tables required to validate such
objects.
Objects allocated in this way can be freed with a supervisor-only
API call, or when the number of references to that object drops to
zero.
config SIMPLE_FATAL_ERROR_HANDLER
bool "Simple system fatal error handler"
default y if !MULTITHREADING
help
Provides an implementation of _SysFatalErrorHandler() that hard hangs
instead of aborting the faulting thread, and does not print anything,
for footprint-concerned systems. Only enable this option if you do not
want debug capabilities in case of system fatal error.
if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
config NOCACHE_MEMORY
bool "Support for uncached memory"
help
Add a "nocache" read-write memory section that is configured to
not be cached. This memory section can be used to perform DMA
transfers when cache coherence issues are not optimal or can not
be solved using cache maintenance operations.
endif # ARCH_HAS_NOCACHE_MEMORY_SUPPORT
menu "Interrupt Configuration"
#
# Interrupt related configs
#
config DYNAMIC_INTERRUPTS
bool "Enable installation of IRQs at runtime"
help
Enable installation of interrupts at runtime, which will move some
interrupt-related data structures to RAM instead of ROM, and
on some architectures increase code size.
config GEN_ISR_TABLES
bool "Use generated IRQ tables"
help
This option controls whether a platform uses the gen_isr_tables
script to generate its interrupt tables. This mechanism will create
an appropriate hardware vector table and/or software IRQ table.
config GEN_IRQ_VECTOR_TABLE
bool "Generate an interrupt vector table"
default y
depends on GEN_ISR_TABLES
help
This option controls whether a platform using gen_isr_tables
needs an interrupt vector table created. Only disable this if the
platform does not use a vector table at all, or requires the vector
table to be in a format that is not an array of function pointers
indexed by IRQ line. In the latter case, the vector table must be
supplied by the application or architecture code.
config GEN_SW_ISR_TABLE
bool "Generate a software ISR table"
default y
depends on GEN_ISR_TABLES
help
This option controls whether a platform using gen_isr_tables
needs a software ISR table table created. This is an array of struct
_isr_table_entry containing the interrupt service routine and supplied
parameter.
config GEN_IRQ_START_VECTOR
int
default 0
depends on GEN_ISR_TABLES
help
On some architectures, part of the vector table may be reserved for
system exceptions and is declared separately from the tables
created by gen_isr_tables.py. When creating these tables, this value
will be subtracted from CONFIG_NUM_IRQS to properly size them.
This is a hidden option which needs to be set per architecture and
left alone.
config IRQ_OFFLOAD
bool "Enable IRQ offload"
help
Enable irq_offload() API which allows functions to be synchronously
run in interrupt context. Mainly useful for test cases.
endmenu # Interrupt configuration
endmenu
#
# Architecture Capabilities
#
config ARCH_HAS_TRUSTED_EXECUTION
bool
config ARCH_HAS_STACK_PROTECTION
bool
config ARCH_HAS_USERSPACE
bool
config ARCH_HAS_EXECUTABLE_PAGE_BIT
bool
config ARCH_HAS_NOCACHE_MEMORY_SUPPORT
bool
config ARCH_HAS_RAMFUNC_SUPPORT
bool
#
# Other architecture related options
#
config ARCH_HAS_THREAD_ABORT
bool
#
# Hidden PM feature configs which are to be selected by
# individual SoC.
#
config HAS_STATE_LOW_POWER_1
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_LOW_POWER_1
configuration option.
config HAS_STATE_LOW_POWER_2
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_LOW_POWER_2
configuration option.
config HAS_STATE_LOW_POWER_3
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_LOW_POWER_3
configuration option.
config HAS_STATE_DEEP_SLEEP_1
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_1
configuration option.
config HAS_STATE_DEEP_SLEEP_2
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_2
configuration option.
config HAS_STATE_DEEP_SLEEP_3
# Hidden
bool
help
This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_3
configuration option.
config BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
# Hidden
bool
help
This option signifies that the target has options of bootloaders
that support context restore upon resume from deep sleep
# End hidden CPU family configs
#
config CPU_HAS_TEE
bool
help
This option is enabled when the CPU has support for Trusted
Execution Environment (e.g. when it has a security attribution
unit).
config CPU_HAS_FPU
bool
help
This option is enabled when the CPU has hardware floating point
unit.
config CPU_HAS_MPU
bool
# Omit prompt to signify "hidden" option
help
This option is enabled when the CPU has a Memory Protection Unit (MPU).
config MEMORY_PROTECTION
bool
# Omit prompt to signify "hidden" option
help
This option is enabled when Memory Protection features are supported.
Memory protection support is currently available on ARC, ARM, and x86
architectures.
config MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
bool
# Omit prompt to signify "hidden" option
help
This option is enabled when the MPU requires a power of two alignment
and size for MPU regions.
config MPU_REQUIRES_NON_OVERLAPPING_REGIONS
bool
# Omit prompt to signify "hidden" option
help
This option is enabled when the MPU requires the active (i.e. enabled)
MPU regions to be non-overlapping with each other.
menuconfig FLOAT
bool "Floating point"
depends on CPU_HAS_FPU
help
This option allows threads to use the floating point registers.
By default, only a single thread may use the registers.
Disabling this option means that any thread that uses a
floating point register will get a fatal exception.
if FLOAT
config FP_SHARING
bool "Floating point register sharing"
help
This option allows multiple threads to use the floating point
registers.
endif # FLOAT
#
# End hidden PM feature configs
#
config ARCH
string
help
System architecture string.
config SOC
string
help
SoC name which can be found under soc/<arch>/<soc name>.
This option holds the directory name used by the build system to locate
the correct linker and header files for the SoC.
config SOC_SERIES
string
help
SoC series name which can be found under soc/<arch>/<family>/<series>.
This option holds the directory name used by the build system to locate
the correct linker and header files.
config SOC_FAMILY
string
help
SoC family name which can be found under soc/<arch>/<family>.
This option holds the directory name used by the build system to locate
the correct linker and header files.
config BOARD
string
help
This option holds the name of the board and is used to locate the files
related to the board in the source tree (under boards/).
The Board is the first location where we search for a linker.ld file,
if not found we look for the linker file in
soc/<arch>/<family>/<series>