boards: arm: add STM32H735G discovery kit

Add the STM32H735G discovery kit to the available boards.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>

boards/arm/stm32h735g_disco/Kconfig.board

@@ -0,0 +1,8 @@
+# STM32H735G Discovery board configuration
+
+# Copyright (c) 2021 SILA Embedded Solutions GmbH
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_STM32H735G_DISCO
+	bool "STM32H735G Discovery Development Board"
+	depends on SOC_STM32H735XX

boards/arm/stm32h735g_disco/Kconfig.defconfig

@@ -0,0 +1,16 @@
+# STM32H735G DISCOVERY board configuration
+
+# Copyright (c) 2021 SILA Embedded Solutions GmbH
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_STM32H735G_DISCO
+
+config BOARD
+	default "stm32h735g_disco"
+
+config SPI_STM32_INTERRUPT
+	default y
+	depends on SPI
+
+
+endif # BOARD_STM32H735G_DISCO

boards/arm/stm32h735g_disco/board.cmake

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=STM32H735IG" "--speed=4000")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/arm/stm32h735g_disco/doc/index.rst

@@ -0,0 +1,143 @@
+.. _stm32h735g_disco_board:
+
+ST STM32H735G Discovery
+#######################
+
+Overview
+********
+
+The STM32H735G-DK Discovery kit is a complete demonstration and development
+platform for Arm® Cortex®-M7 core-based STM32H735IGK6U microcontroller, with
+1 Mbyte of Flash memory and 564 Kbytes of SRAM.
+
+The STM32H735G-DK Discovery kit is used as a reference design for user
+application development before porting to the final product, thus simplifying
+the application development.
+
+The full range of hardware features available on the board helps users to enhance
+their application development by an evaluation of all the peripherals (such as
+USB OTG FS, Ethernet, microSD™ card, USART, CAN FD, SAI audio DAC stereo with
+audio jack input and output, MEMS digital microphone, HyperRAM™,
+Octo-SPI Flash memory, RGB interface LCD with capacitive touch panel, and others).
+ARDUINO® Uno V3, Pmod™ and STMod+ connectors provide easy connection to extension
+shields or daughterboards for specific applications.
+
+STLINK-V3E is integrated into the board, as the embedded in-circuit debugger and
+programmer for the STM32 MCU and USB Virtual COM port bridge. STM32H735G-DK board
+comes with the STM32CubeH7 MCU Package, which provides an STM32 comprehensive
+software HAL library as well as various software examples.
+
+.. image:: img/stm32h735g_disco.jpg
+     :width: 472px
+     :align: center
+     :height: 352px
+     :alt: STM32H735G-DISCO
+
+More information about the board can be found at the `STM32H735G-DISCO website`_.
+More information about STM32H735 can be found here:
+
+- `STM32H725/735 on www.st.com`_
+- `STM32H735xx reference manual`_
+- `STM32H735xx datasheet`_
+
+Supported Features
+==================
+
+The current Zephyr stm32h735g_disco board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| FLASH     | on-chip    | flash memory                        |
++-----------+------------+-------------------------------------+
+| ETHERNET  | on-chip    | ethernet                            |
++-----------+------------+-------------------------------------+
+| RNG       | on-chip    | True Random number generator        |
++-----------+------------+-------------------------------------+
+| FMC       | on-chip    | memc (SDRAM)                        |
++-----------+------------+-------------------------------------+
+
+
+Other hardware features are not yet supported on Zephyr porting.
+
+The default configuration per core can be found in the defconfig file:
+``boards/arm/stm32h735g_disco/stm32h735g_disco_defconfig``
+
+Pin Mapping
+===========
+
+For mode details please refer to `STM32H735G-DISCO website`_.
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+
+- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
+- UART_7 TX/RX : PF7/PF6 (Arduino Serial)
+- LD1 : PC2
+- LD2 : PC3
+
+System Clock
+============
+
+The STM32H735G System Clock can be driven by an internal or external oscillator,
+as well as by the main PLL clock. By default, the System clock
+is driven by the PLL clock at 550MHz. PLL clock is feed by a 25MHz high speed external clock.
+
+Serial Port
+===========
+
+The STM32H735G Discovery kit has up to 6 UARTs.
+The Zephyr console output is assigned to UART3 which connected to the onboard ST-LINK/V3.0. Virtual
+COM port interface. Default communication settings are 115200 8N1.
+
+
+Programming and Debugging
+*************************
+
+See :ref:`build_an_application` for more information about application builds.
+
+
+Flashing
+========
+
+Flashing operation will depend on the target to be flashed and the SoC
+option bytes configuration.
+It is advised to use `STM32CubeProgrammer`_ to check and update option bytes
+configuration and flash the ``stm32h735g_disco`` target.
+
+
+Debugging
+=========
+
+You can debug an application in the usual way.  Here is an example for the
+:ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: stm32h735g_disco
+   :goals: debug
+
+
+.. _STM32H735G-DISCO website:
+   https://www.st.com/en/evaluation-tools/stm32h735g-dk.html
+
+.. _STM32H725/735 on www.st.com:
+   https://www.st.com/en/microcontrollers-microprocessors/stm32h725-735.html
+
+.. _STM32H735xx reference manual:
+   https://www.st.com/resource/en/reference_manual/dm00603761-stm32h723733-stm32h725735-and-stm32h730-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
+
+.. _STM32H735xx datasheet:
+   https://www.st.com/resource/en/datasheet/stm32h735ag.pdf
+
+.. _STM32CubeProgrammer:
+   https://www.st.com/en/development-tools/stm32cubeprog.html

boards/arm/stm32h735g_disco/stm32h735g_disco.dts

@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2021 SILA Embedded Solutions GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/h7/stm32h735Xg.dtsi>
+#include <st/h7/stm32h735igkx-pinctrl.dtsi>
+
+/ {
+	model = "STMicroelectronics STM32H735G DISCOVERY board";
+	compatible = "st,stm32h735g-disco";
+
+	chosen {
+		zephyr,console = &usart3;
+		zephyr,shell-uart = &usart3;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		red_led: led_1 {
+			gpios = <&gpioc 2 GPIO_ACTIVE_HIGH>;
+			label = "User LD2";
+		};
+		green_led: led_2 {
+			gpios = <&gpioc 3 GPIO_ACTIVE_HIGH>;
+			label = "User LD1";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		user_button: button {
+			label = "User";
+			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	aliases {
+		led0 = &red_led;
+		led1 = &green_led;
+		sw0 = &user_button;
+	};
+};
+
+&clk_hse {
+	clock-frequency = <DT_FREQ_M(25)>;
+	status = "okay";
+};
+
+&pll {
+	div-m = <5>;
+	mul-n = <110>;
+	div-p = <1>;
+	div-q = <4>;
+	div-r = <2>;
+	clocks = <&clk_hse>;
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&pll>;
+	clock-frequency = <DT_FREQ_M(550)>;
+	d1cpre = <1>;
+	hpre = <2>;
+	d1ppre = <2>;
+	d2ppre1 = <2>;
+	d2ppre2 = <2>;
+	d3ppre = <2>;
+};
+
+&usart3 {
+	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&uart7 {
+	pinctrl-0 = <&uart7_tx_pf7 &uart7_rx_pf6>;
+	current-speed = <115200>;
+};
+
+&i2c4 {
+	pinctrl-0 = <&i2c4_scl_pf14 &i2c4_sda_pf15>;
+};
+
+&mac {
+	pinctrl-0 = <&eth_mdc_pc1
+		     &eth_rxd0_pc4
+		     &eth_rxd1_pc5
+		     &eth_ref_clk_pa1
+		     &eth_mdio_pa2
+		     &eth_crs_dv_pa7
+		     &eth_tx_en_pb11
+		     &eth_txd0_pb12
+		     &eth_txd1_pb13>;
+};
+
+&sdmmc1 {
+	pinctrl-0 = <&sdmmc1_d0_pc8
+		     &sdmmc1_d1_pc9
+		     &sdmmc1_d2_pc10
+		     &sdmmc1_d3_pc11
+		     &sdmmc1_ck_pc12
+		     &sdmmc1_cmd_pd2>;
+	cd-gpios = <&gpiof 5 GPIO_ACTIVE_LOW>;
+};

boards/arm/stm32h735g_disco/stm32h735g_disco.yaml

@@ -0,0 +1,15 @@
+identifier: stm32h735g_disco
+name: ST STM32H735G Discovery
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 368
+flash: 1024
+supported:
+  - arduino_gpio
+  - gpio
+  - netif:eth
+  - memc

boards/arm/stm32h735g_disco/stm32h735g_disco_defconfig

@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_STM32H7X=y
+CONFIG_SOC_STM32H735XX=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable HW stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+CONFIG_SERIAL=y
+
+# console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# enable pinmux
+CONFIG_PINMUX=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# Enable Clocks
+CONFIG_CLOCK_CONTROL=y
+
+CONFIG_NO_OPTIMIZATIONS=y

boards/arm/stm32h735g_disco/support/openocd.cfg

@@ -0,0 +1,7 @@
+source [find interface/stlink.cfg]
+
+transport select hla_swd
+
+source [find target/stm32h7x.cfg]
+
+reset_config connect_assert_srst

drivers/clock_control/clock_stm32_ll_h7.c

@@ -106,7 +106,8 @@
 #define SYSCLK_FREQ_MAX		480000000UL
 #define AHB_FREQ_MAX		240000000UL
 #define APBx_FREQ_MAX		120000000UL
-#elif defined(CONFIG_SOC_STM32H723XX)
+#elif defined(CONFIG_SOC_STM32H723XX) ||\
+	  defined(CONFIG_SOC_STM32H735XX)
 /* All h7 SoC with maximum 550MHz SYSCLK */
 #define SYSCLK_FREQ_MAX		550000000UL
 #define AHB_FREQ_MAX		275000000UL

dts/arm/st/h7/stm32h7.dtsi

@@ -800,6 +800,22 @@
 			label = "RNG";
 		};
 
+		sdmmc1: sdmmc@52007000 {
+			compatible = "st,stm32-sdmmc";
+			reg = <0x52007000 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00010000>;
+			status = "disabled";
+			label = "SDMMC_1";
+		};
+
+		sdmmc2: sdmmc@48022400 {
+			compatible = "st,stm32-sdmmc";
+			reg = <0x48022400 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000100>;
+			status = "disabled";
+			label = "SDMMC_2";
+		};
+
 		mac: ethernet@40028000 {
 			compatible = "st,stm32-ethernet";
 			reg = <0x40028000 0x8000>;

dts/arm/st/h7/stm32h735.dtsi

@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2021 SILA Embedded Solutions GmbH
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <st/h7/stm32h7.dtsi>
+
+/ {
+	soc {
+		flash-controller@52002000 {
+			flash0: flash@8000000 {
+				write-block-size = <32>;
+				erase-block-size = <DT_SIZE_K(128)>;
+			};
+		};
+
+		uart9: serial@40011800 {
+			compatible = "st,stm32-uart";
+			reg = <0x40011800 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000040>;
+			interrupts = <155 0>;
+			status = "disabled";
+			label = "UART_9";
+		};
+
+		usart10: serial@40011c00 {
+			compatible = "st,stm32-usart", "st,stm32-uart";
+			reg = <0x40011c00 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000080>;
+			interrupts = <156 0>;
+			status = "disabled";
+			label = "UART_10";
+		};
+
+		dmamux1: dmamux@40020800 {
+			dma-requests= <129>;
+		};
+
+		cryp: cryp@48021000 {
+			compatible = "st,stm32-cryp";
+			reg = <0x48021000 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;
+			interrupts = <79 0>;
+			status = "disabled";
+			label = "CRYP";
+		};
+	};
+
+	/* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
+	sram0: memory@24000000 {
+		reg = <0x24000000 DT_SIZE_K(320)>;
+		compatible = "mmio-sram";
+	};
+
+	/* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
+	sram1: memory@30000000 {
+		reg = <0x30000000 DT_SIZE_K(16)>;
+		compatible = "mmio-sram";
+	};
+
+	/* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
+	sram2: memory@30040000 {
+		reg = <0x30040000 DT_SIZE_K(16)>;
+		compatible = "mmio-sram";
+	};
+
+	/* System data RAM accessible over AHB bus: SRAM4 in D3 domain  */
+	sram4: memory@38000000 {
+		reg = <0x38000000 DT_SIZE_K(16)>;
+		compatible = "mmio-sram";
+	};
+
+	dtcm: memory@20000000 {
+		compatible = "arm,dtcm";
+		reg = <0x20000000 DT_SIZE_K(128)>;
+	};
+};

dts/arm/st/h7/stm32h735Xg.dtsi

@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2021 SILA Embedded Solutions GmbH
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <st/h7/stm32h735.dtsi>
+
+/ {
+	soc {
+		flash-controller@52002000 {
+			flash0: flash@8000000 {
+				compatible = "soc-nv-flash";
+				label = "FLASH_STM32";
+				reg = <0x08000000 DT_SIZE_K(1024)>;
+			};
+		};
+	};
+};

soc/arm/st_stm32/stm32h7/Kconfig.defconfig.stm32h735xx

@@ -0,0 +1,14 @@
+# ST STM32H723X MCU configuration options
+
+# Copyright (c) 2021 SILA Embedded Solutions GmbH
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_STM32H735XX
+
+config SOC
+	default "stm32h735xx"
+
+config NUM_IRQS
+	default 163
+
+endif # SOC_STM32H735XX

soc/arm/st_stm32/stm32h7/Kconfig.soc

@@ -13,6 +13,11 @@ config SOC_STM32H723XX
 	select CPU_CORTEX_M7
 	select CPU_HAS_FPU_DOUBLE_PRECISION
 
+config SOC_STM32H735XX
+	bool "STM32H735XX"
+	select CPU_CORTEX_M7
+	select CPU_HAS_FPU_DOUBLE_PRECISION
+
 config SOC_STM32H743XX
 	bool "STM32H743XX"
 	select CPU_CORTEX_M7