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drivers: sdhc: imx_usdhc: add explicit fallthrough to I/O timing setup

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DDR50/DDR52 modes should use PINCTRL_STATE_SLOW (50MHz), so the lack of a
break statement after enabling DDR mode is expected. Add an explicit
__fallthrough to resolve the issue flagged by coverity scan

Fixes #65324

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2023-12-06 11:02:32 -06:00 committed by Carles Cufí
parent 0b365359dc
commit 2236eaf52c
1 changed files with 1 additions and 0 deletions
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drivers/sdhc/imx_usdhc.c
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@ -404,6 +404,7 @@ static int imx_usdhc_set_io(const struct device *dev, struct sdhc_io *ios)
case SDHC_TIMING_DDR52: case SDHC_TIMING_DDR52:
/* Enable DDR mode */ /* Enable DDR mode */
USDHC_EnableDDRMode(cfg->base, true, 0); USDHC_EnableDDRMode(cfg->base, true, 0);
__fallthrough;
case SDHC_TIMING_SDR12: case SDHC_TIMING_SDR12:
case SDHC_TIMING_SDR25: case SDHC_TIMING_SDR25:
pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_SLOW); pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_SLOW);