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clock: stm32f4: Fix wrong BKPSRAM and CCMDATARAM clocks

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It appears that enable bits for BKPSRAM and CCMDATARAM are incorrectly
defined as bit 14 and 16 on AHB1 respectively (when these IPs are present),
where we should use bit 18 and 20 according to the various reference
manuals (STM32F415 for instance).

Change-Id: I44ce59a29c57e306f6a945e46043efbcfce7a92f
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
This commit is contained in:
Florian Vaussard 2016-12-08 11:53:13 +01:00 committed by Kumar Gala
parent 33579adef9
commit 2304e0facf
1 changed files with 2 additions and 2 deletions
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4
include/drivers/clock_control/stm32f4_clock_control.h
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@ -36,8 +36,8 @@ enum {
STM32F4X_CLOCK_ENABLE_GPIOJ = 1 << 9,
STM32F4X_CLOCK_ENABLE_GPIOK = 1 << 10,
STM32F4X_CLOCK_ENABLE_CRC = 1 << 12,
STM32F4X_CLOCK_ENABLE_BKPSRAM = 1 << 14,
STM32F4X_CLOCK_ENABLE_CCMDATARAM = 1 << 16,
STM32F4X_CLOCK_ENABLE_BKPSRAM = 1 << 18,
STM32F4X_CLOCK_ENABLE_CCMDATARAM = 1 << 20,
STM32F4X_CLOCK_ENABLE_DMA1 = 1 << 21,
STM32F4X_CLOCK_ENABLE_DMA2 = 1 << 22,
STM32F4X_CLOCK_ENABLE_ETHMAC = 1 << 25,