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drivers: nxp_flexram: Fix GPR 17 calculation

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GPR17 calculation for configuration of RAM banks is incorrect,
bit shift should be 2 per idx, not 1, this is major bug that needs
correcting, currently all RT boards are affected with wrong
configuration.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2023-11-15 11:52:12 -06:00 committed by Mahesh Mahadevan
parent 18d28ea144
commit 447f12d942
1 changed files with 1 additions and 1 deletions
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drivers/memc/memc_nxp_flexram.h
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@ -44,7 +44,7 @@ void memc_flexram_register_callback(flexram_callback_t callback, void *user_data
* call from platform_init to set up flexram if using runtime map
* must be inlined because cannot use stack
*/
#define GPR17_REG_FILL(node_id, prop, idx) + (DT_PROP_BY_IDX(node_id, prop, idx) << idx)
#define GPR17_REG_FILL(node_id, prop, idx) + (DT_PROP_BY_IDX(node_id, prop, idx) << (2*idx))
static inline void memc_flexram_dt_partition(void)
{
/* iomuxc_gpr must be const (in ROM region) because used in reconfiguring ram */