boards: arm: Add support for SiLabs EFM32PG1B SLSTK3401A board

This commit adds support for Silicon Labs SLSTK3401A Pearl Gecko board.

Signed-off-by: Rafael Dias Menezes <rdmeneze@gmail.com>

boards/arm/efm32pg_stk3401a/CMakeLists.txt

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+# SPDX-License-Identifier: Apache-2.0
+
+if(CONFIG_UART_GECKO)
+  zephyr_library()
+  zephyr_library_sources(board.c)
+  zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
+endif()

boards/arm/efm32pg_stk3401a/Kconfig

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+# EFM32PG STK3401A board configuration
+
+# Copyright (c) 2020 Rafael Dias Menezes <rdmeneze@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_INIT_PRIORITY
+	int
+	default KERNEL_INIT_PRIORITY_DEFAULT
+	depends on BOARD_EFM32PG_STK3401A
+	depends on GPIO
+	help
+	  Board initialization priority. This must be bigger than
+	  GPIO_GECKO_COMMON_INIT_PRIORITY.

boards/arm/efm32pg_stk3401a/Kconfig.board

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+# EFM32PG STK3401A board
+
+# Copyright (c) 2020, Rafael Dias Menezes <rdmeneze@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_EFM32PG_STK3401A
+	bool "SiLabs EFM32PG-STK3401A (Pearl Gecko)"
+	depends on SOC_SERIES_EFM32PG1B
+	select SOC_PART_NUMBER_EFM32PG1B200F256GM48

boards/arm/efm32pg_stk3401a/Kconfig.defconfig

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+# EFM32PG STK3401A board
+
+# Copyright (c) 2020, Rafael Dias Menezes <rdmeneze@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_EFM32PG_STK3401A
+
+config BOARD
+	default "efm32pg_stk3401a" if BOARD_EFM32PG_STK3401A
+
+config CMU_HFXO_FREQ
+	default 40000000
+
+config CMU_LFXO_FREQ
+	default 32768
+
+config COUNTER_GECKO_RTCC
+	default y
+	depends on COUNTER
+
+endif # BOARD_EFM32PG_STK3401A

boards/arm/efm32pg_stk3401a/board.c

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+/*
+ * Copyright (c) 2020 Rafael Dias Menezes <rdmeneze@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <init.h>
+#include "board.h"
+#include <drivers/gpio.h>
+#include <sys/printk.h>
+
+static int efm32pg_stk3401a_init(const struct device *dev)
+{
+	const struct device *bce_dev; /* Board Controller Enable Gpio Device */
+
+	ARG_UNUSED(dev);
+
+	/* Enable the board controller to be able to use the serial port */
+	bce_dev = device_get_binding(BC_ENABLE_GPIO_NAME);
+
+	if (!bce_dev) {
+		printk("Board controller gpio port was not found!\n");
+		return -ENODEV;
+	}
+
+	gpio_pin_configure(bce_dev, BC_ENABLE_GPIO_PIN, GPIO_OUTPUT_HIGH);
+
+	return 0;
+}
+
+/* needs to be done after GPIO driver init */
+SYS_INIT(efm32pg_stk3401a_init, PRE_KERNEL_1, CONFIG_BOARD_INIT_PRIORITY);

boards/arm/efm32pg_stk3401a/board.cmake

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+#
+# Copyright (c) 2020, Rafael Dias Menezes <rdmeneze@gmail.com>
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+board_runner_args(jlink "--device=EFM32PG1BxxxF256")
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/arm/efm32pg_stk3401a/board.h

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+/*
+ * Copyright (c) 2018 Christian Taedcke
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+/* This pin is used to enable the serial port using the board controller */
+#define BC_ENABLE_GPIO_NAME  "GPIO_A"
+#define BC_ENABLE_GPIO_PIN   5
+
+#endif /* __INC_BOARD_H */

boards/arm/efm32pg_stk3401a/doc/index.rst

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+.. _efm32pg_stk3401a:
+
+EFM32 Pearl Gecko Starter Kit
+#############################
+
+Overview
+********
+
+The EFM32 Pearl Gecko Starter Kit EFM32PG-STK3401A contains an MCU from the
+EFM32PG family built on an ARM® Cortex®-M4F processor with excellent low
+power capabilities.
+
+.. figure:: ./efm32pg_stk3401a.jpg
+   :width: 375px
+   :align: center
+   :alt: EFM32PG-SLSTK3401A
+
+   EFM32PG-SLSTK3401A (image courtesy of Silicon Labs)
+
+Hardware
+********
+
+- Advanced Energy Monitoring provides real-time information about the energy
+  consumption of an application or prototype design.
+- Ultra low power 128x128 pixel Memory-LCD
+- 2 user buttons, 2 LEDs and 2 capacitive buttons
+- Humidity and temperature sensor
+- On-board Segger J-Link USB debugger
+
+For more information about the EFM32PG SoC and EFM32PG-STK3401A board:
+
+- `EFM32PG Website`_
+- `EFM32PG1 Datasheet`_
+- `EFM32PG1 Reference Manual`_
+- `EFM32PG-STK3401A Website`_
+- `EFM32PG-STK3401A User Guide`_
+
+Supported Features
+==================
+
+The efm32pg_stk3401a board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| MPU       | on-chip    | memory protection unit              |
++-----------+------------+-------------------------------------+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | systick                             |
++-----------+------------+-------------------------------------+
+| COUNTER   | on-chip    | rtcc                                |
++-----------+------------+-------------------------------------+
+| FLASH     | on-chip    | flash memory                        |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| I2C       | on-chip    | i2c port-polling                    |
++-----------+------------+-------------------------------------+
+| WATCHDOG  | on-chip    | watchdog                            |
++-----------+------------+-------------------------------------+
+
+The default configuration can be found in the defconfig file:
+
+	``boards/arm/efm32pg_stk3401a/efm32pg_stk3401a_defconfig``
+
+Other hardware features are currently not supported by the port.
+
+Connections and IOs
+===================
+
+The EFM32PG1 SoC has five GPIO controllers (PORTA to PORTD and PORTF) and
+all are enabled for the EFM32PG-STK3401A board.
+
+In the following table, the column **Name** contains pin names. For example, PF4
+means pin number 4 on PORTF, as used in the board's datasheets and manuals.
+
++-------+-------------+-------------------------------------+
+| Name  | Function    | Usage                               |
++=======+=============+=====================================+
+| PF4   | GPIO        | LED0                                |
++-------+-------------+-------------------------------------+
+| PF5   | GPIO        | LED1                                |
++-------+-------------+-------------------------------------+
+| PF6   | GPIO        | Push Button PB0                     |
++-------+-------------+-------------------------------------+
+| PF7   | GPIO        | Push Button PB1                     |
++-------+-------------+-------------------------------------+
+| PA5   | GPIO        | Board Controller Enable             |
+|       |             | EFM_BC_EN                           |
++-------+-------------+-------------------------------------+
+| PA0   | UART_TX     | UART TX Console VCOM_TX US0_TX #0   |
++-------+-------------+-------------------------------------+
+| PA1   | UART_RX     | UART RX Console VCOM_RX US0_RX #0   |
++-------+-------------+-------------------------------------+
+| PD10  | UART_TX     | EXP12_UART_TX LEU0_TX #18           |
++-------+-------------+-------------------------------------+
+| PD11  | UART_RX     | EXP14_UART_RX LEU0_RX #18           |
++-------+-------------+-------------------------------------+
+| PC10  | I2C_SDA     | ENV_I2C_SDA I2C0_SDA #15            |
++-------+-------------+-------------------------------------+
+| PC11  | I2C_SCL     | ENV_I2C_SCL I2C0_SCL #15            |
++-------+-------------+-------------------------------------+
+
+
+System Clock
+============
+
+The EFM32PG SoC is configured to use the 40 MHz external oscillator on the
+board.
+
+Serial Port
+===========
+
+The EFM32PG SoC has two USARTs and one Low Energy UART (LEUART).
+
+Programming and Debugging
+*************************
+
+.. note::
+   Before using the kit the first time, you should update the J-Link firmware
+   from `J-Link-Downloads`_
+
+Flashing
+========
+
+The EFM32PG-STK3401A includes an `J-Link`_ serial and debug adaptor built into the
+board. The adaptor provides:
+
+- A USB connection to the host computer, which exposes a mass storage device and a
+  USB serial port.
+- A serial flash device, which implements the USB flash disk file storage.
+- A physical UART connection which is relayed over interface USB serial port.
+
+Flashing an application to EFM32PG-STK3401A
+-------------------------------------------
+
+The sample application :ref:`hello_world` is used for this example.
+Build the Zephyr kernel and application:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: efm32pg_stk3401a
+   :goals: build
+
+Connect the EFM32PG-STK3401A to your host computer using the USB port and you
+should see a USB connection which exposes a mass storage device(STK3401A).
+Copy the generated zephyr.bin to the STK3401A drive.
+
+Use a USB-to-UART converter such as an FT232/CP2102 to connect to the UART on the
+expansion header.
+
+Open a serial terminal (minicom, putty, etc.) with the following settings:
+
+- Speed: 115200
+- Data: 8 bits
+- Parity: None
+- Stop bits: 1
+
+Reset the board and you'll see the following message on the corresponding serial port
+terminal session:
+
+.. code-block:: console
+
+   Hello World! arm
+
+
+.. _EFM32PG-STK3401A Website:
+   https://www.silabs.com/development-tools/mcu/32-bit/efm32pg1-starter-kit
+
+.. _EFM32PG-STK3401A User Guide:
+   https://www.silabs.com/documents/public/user-guides/ug154-stk3401-user-guide.pdf
+
+.. _EFM32PG Website:
+   https://www.silabs.com/products/mcu/32-bit/efm32-pearl-gecko
+
+.. _EFM32PG1 Datasheet:
+   https://www.silabs.com/documents/public/data-sheets/efm32pg1-datasheet.pdf
+
+.. _EFM32PG1 Reference Manual:
+   https://www.silabs.com/documents/public/reference-manuals/efm32pg1-rm.pdf
+
+.. _J-Link:
+   https://www.segger.com/jlink-debug-probes.html
+
+.. _J-Link-Downloads:
+   https://www.segger.com/downloads/jlink

boards/arm/efm32pg_stk3401a/efm32pg_stk3401a.dts

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+/*
+ * Copyright (c) 2020 Rafael Dias Menezes <rdmeneze@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <silabs/efm32pg1b200f256gm48.dtsi>
+#include "efm32pg_stk3401a_common.dtsi"
+
+/ {
+	model = "Silicon Labs EFM32PG STK3401A board";
+	compatible = "silabs,efm32pg_stk3401a", "silabs,efm32pg1b";
+};

boards/arm/efm32pg_stk3401a/efm32pg_stk3401a.yaml

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+identifier: efm32pg_stk3401a
+name: EFM32PG-STK3401A
+type: mcu
+arch: arm
+ram: 32
+flash: 256
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - i2c
+  - gpio
+  - nvs
+  - watchdog
+testing:
+  ignore_tags:
+    - net
+    - bluetooth

boards/arm/efm32pg_stk3401a/efm32pg_stk3401a_common.dtsi

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+/*
+ * Copyright (c) 2020 Rafael Dias Menezes <rdmeneze@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	model = "Silicon Labs EFM32PG STK3401A board";
+
+	chosen {
+		zephyr,console = &usart0;
+		zephyr,shell-uart = &usart0;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		watchdog0 = &wdog0;
+	};
+
+	/* These aliases are provided for compatibility with samples */
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		sw0 = &button0;
+		sw1 = &button1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led0: led_0 {
+			gpios = <&gpiof 4 0>;
+			label = "LED 0";
+		};
+		led1: led_1 {
+			gpios = <&gpiof 5 0>;
+			label = "LED 1";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+		button0: button_0 {
+			/* gpio flags need validation */
+			gpios = <&gpiof 6 GPIO_ACTIVE_LOW>;
+			label = "User Push Button 0";
+		};
+		button1: button_1 {
+			/* gpio flags need validation */
+			gpios = <&gpiof 7 GPIO_ACTIVE_LOW>;
+			label = "User Push Button 1";
+		};
+	};
+};
+
+&cpu0 {
+	clock-frequency = <40000000>;
+};
+
+&usart0 {
+	current-speed = <115200>;
+	location-rx = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(1)>;
+	location-tx = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(0)>;
+	status = "okay";
+};
+
+&leuart0 {
+	current-speed = <9600>;
+	location-rx = <GECKO_LOCATION(18) GECKO_PORT_D GECKO_PIN(11)>;
+	location-tx = <GECKO_LOCATION(18) GECKO_PORT_D GECKO_PIN(10)>;
+	status = "okay";
+};
+
+&i2c0 {
+	location-sda = <GECKO_LOCATION(15) GECKO_PORT_C GECKO_PIN(10)>;
+	location-scl = <GECKO_LOCATION(15) GECKO_PORT_C GECKO_PIN(11)>;
+	status = "okay";
+};
+
+&rtcc0 {
+	prescaler = <1>;
+	status = "okay";
+};
+
+&gpio {
+	location-swo = <0>;
+	status = "okay";
+};
+
+&gpioa {
+	status = "okay";
+};
+
+&gpiob {
+	status = "okay";
+};
+
+&gpioc {
+	status = "okay";
+};
+
+&gpiod {
+	status = "okay";
+};
+
+&gpiof {
+	status = "okay";
+};
+
+&wdog0 {
+	status = "okay";
+};
+
+&flash0 {
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* Set 6Kb of storage at the end of the 256Kb of flash */
+		storage_partition: partition@fe800 {
+			label = "storage";
+			reg = <0x0003e800 0x00001800>;
+		};
+
+	};
+};

boards/arm/efm32pg_stk3401a/efm32pg_stk3401a_defconfig

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+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_EFM32PG1B=y
+CONFIG_BOARD_EFM32PG_STK3401A=y
+CONFIG_ARM_MPU=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_CORTEX_M_SYSTICK=y
+CONFIG_GPIO=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=40000000
+CONFIG_CMU_HFCLK_HFXO=y