soc: arm: nordic_nrf: remove custom fixed MPU region definition

We remove the custom fixed MPU region definition from Nordic
nRF SoC definition, as the common fixed MPU region definition
is now used.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2019-12-05 15:29:22 +01:00 committed by Anas Nashif
parent cede12b159
commit 95e8cd0041
7 changed files with 0 additions and 150 deletions

View file

@ -10,10 +10,6 @@ zephyr_library_sources_ifdef(CONFIG_SYS_POWER_MANAGEMENT
power.c
)
zephyr_library_sources_ifdef(CONFIG_ARM_MPU
mpu_regions.c
)
zephyr_library_include_directories(
${ZEPHYR_BASE}/kernel/include
${ZEPHYR_BASE}/arch/arm/include

View file

@ -1,47 +0,0 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _NRF52X_MPU_MEM_CFG_H_
#define _NRF52X_MPU_MEM_CFG_H_
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
/* Flash Region Definitions */
#if CONFIG_FLASH_SIZE == 64
#define REGION_FLASH_SIZE REGION_64K
#elif CONFIG_FLASH_SIZE == 128
#define REGION_FLASH_SIZE REGION_128K
#elif CONFIG_FLASH_SIZE == 192
/* Use the next power-of-two size, to save one MPU region. */
#define REGION_FLASH_SIZE REGION_256K
#elif CONFIG_FLASH_SIZE == 256
#define REGION_FLASH_SIZE REGION_256K
#elif CONFIG_FLASH_SIZE == 512
#define REGION_FLASH_SIZE REGION_512K
#elif CONFIG_FLASH_SIZE == 1024
#define REGION_FLASH_SIZE REGION_1M
#elif CONFIG_FLASH_SIZE == 2048
#define REGION_FLASH_SIZE REGION_2M
#else
#error "Unsupported configuration"
#endif
/* SRAM Region Definitions */
#if CONFIG_SRAM_SIZE == 24
#define REGION_SRAM_0_SIZE REGION_32K
/* Use the next power-of-two size, to save one MPU region. */
#elif CONFIG_SRAM_SIZE == 32
#define REGION_SRAM_0_SIZE REGION_32K
#elif CONFIG_SRAM_SIZE == 64
#define REGION_SRAM_0_SIZE REGION_64K
#elif CONFIG_SRAM_SIZE == 128
#define REGION_SRAM_0_SIZE REGION_128K
#elif CONFIG_SRAM_SIZE == 256
#define REGION_SRAM_0_SIZE REGION_256K
#else
#error "Unsupported configuration"
#endif
#endif /* _NRF52X_MPU_MEM_CFG_H_ */

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@ -1,37 +0,0 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/slist.h>
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
#include "mpu_mem_cfg.h"
static const struct arm_mpu_region mpu_regions[] = {
/* Region 0 */
MPU_REGION_ENTRY("FLASH_0",
CONFIG_FLASH_BASE_ADDRESS,
REGION_FLASH_ATTR(REGION_FLASH_SIZE)),
#if defined(REGION_FLASH_1_SIZE)
MPU_REGION_ENTRY("FLASH_1",
REGION_FLASH_1_START,
REGION_FLASH_ATTR(REGION_FLASH_1_SIZE)),
#endif /* REGION_FLASH_1_SIZE */
/* Region 1 */
MPU_REGION_ENTRY("SRAM_0",
CONFIG_SRAM_BASE_ADDRESS,
REGION_RAM_ATTR(REGION_SRAM_0_SIZE)),
#if defined(REGION_SRAM_1_SIZE)
MPU_REGION_ENTRY("SRAM_1",
REGION_SRAM_1_START,
REGION_RAM_ATTR(REGION_SRAM_1_SIZE)),
#endif /* REGION_SRAM_1_SIZE */
};
const struct arm_mpu_config mpu_config = {
.num_regions = ARRAY_SIZE(mpu_regions),
.mpu_regions = mpu_regions,
};

View file

@ -3,5 +3,3 @@
zephyr_sources(
soc.c
)
zephyr_sources_ifdef(CONFIG_ARM_MPU mpu_regions.c)

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@ -1,29 +0,0 @@
/*
* Copyright (c) 2017 Linaro Limited.
* Copyright (c) 2019 Nordic Semiconductor ASA.
*
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <misc/slist.h>
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
static const struct arm_mpu_region mpu_regions[] = {
/* Region 0 */
MPU_REGION_ENTRY("FLASH_0",
CONFIG_FLASH_BASE_ADDRESS,
REGION_FLASH_ATTR(CONFIG_FLASH_BASE_ADDRESS, \
CONFIG_FLASH_SIZE * 1024)),
/* Region 1 */
MPU_REGION_ENTRY("SRAM_0",
CONFIG_SRAM_BASE_ADDRESS,
REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \
CONFIG_SRAM_SIZE * 1024)),
};
const struct arm_mpu_config mpu_config = {
.num_regions = ARRAY_SIZE(mpu_regions),
.mpu_regions = mpu_regions,
};

View file

@ -3,5 +3,3 @@
zephyr_sources(
soc.c
)
zephyr_sources_ifdef(CONFIG_ARM_MPU mpu_regions.c)

View file

@ -1,29 +0,0 @@
/*
* Copyright (c) 2017 Linaro Limited.
* Copyright (c) 2018 Nordic Semiconductor ASA.
*
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/slist.h>
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
static const struct arm_mpu_region mpu_regions[] = {
/* Region 0 */
MPU_REGION_ENTRY("FLASH_0",
CONFIG_FLASH_BASE_ADDRESS,
REGION_FLASH_ATTR(CONFIG_FLASH_BASE_ADDRESS, \
CONFIG_FLASH_SIZE * 1024)),
/* Region 1 */
MPU_REGION_ENTRY("SRAM_0",
CONFIG_SRAM_BASE_ADDRESS,
REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \
CONFIG_SRAM_SIZE * 1024)),
};
const struct arm_mpu_config mpu_config = {
.num_regions = ARRAY_SIZE(mpu_regions),
.mpu_regions = mpu_regions,
};