boards: nucleo_f303re: Use dts for clocks configuration

Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
Alexandre Bourdiol 2021-04-30 17:58:49 +02:00 committed by Kumar Gala
parent 53198f3d7a
commit aeb76557cc
2 changed files with 22 additions and 18 deletions

View file

@ -43,6 +43,27 @@
};
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
prediv = <1>;
mul = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(72)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
current-speed = <115200>;

View file

@ -2,8 +2,6 @@
CONFIG_SOC_SERIES_STM32F3X=y
CONFIG_SOC_STM32F303XE=y
# 72 MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
CONFIG_SERIAL=y
@ -23,20 +21,5 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y
# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# Clock configuration for Cube Clock control driver
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# however, the board does not have an external oscillator, so just use
# the 8MHz clock signal coming from integrated STLink
CONFIG_CLOCK_STM32_HSE_BYPASS=y
# produce 72MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_PREDIV1=1
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1