snippets: Add nRF54L15 FLPR core snippets
Add snippets to boot nRF54L15 FLPR from application core. Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
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snippets/nordic-flpr-xip/README.rst
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snippets/nordic-flpr-xip/README.rst
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.. _nordic-flpr-xip:
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Nordic FLPR snippet with execution in place (nordic-flpr-xip)
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#############################################################
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Overview
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********
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This snippet allows users to build Zephyr with the capability to boot Nordic FLPR
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(Fast Lightweight Peripheral Processor) from application core.
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FLPR code is to be executed from RRAM, so the FLPR image must be built
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for the ``xip`` board variant, or with :kconfig:option:`CONFIG_XIP` enabled.
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/*
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* Copyright (c) 2024 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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cpuflpr_code_partition: image@165000 {
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/* FLPR core code partition */
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reg = <0x165000 DT_SIZE_K(96)>;
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};
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};
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};
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};
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&uart30 {
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status = "reserved";
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};
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&cpuflpr_vpr {
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execution-memory = <&cpuflpr_code_partition>;
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};
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snippets/nordic-flpr-xip/nordic-flpr-xip.overlay
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snippets/nordic-flpr-xip/nordic-flpr-xip.overlay
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/*
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* Copyright (c) 2024 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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&cpuflpr_vpr {
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status = "okay";
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};
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&cpuflpr_vevif_remote {
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status = "okay";
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};
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snippets/nordic-flpr-xip/snippet.yml
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snippets/nordic-flpr-xip/snippet.yml
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name: nordic-flpr-xip
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append:
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EXTRA_DTC_OVERLAY_FILE: nordic-flpr-xip.overlay
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boards:
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nrf54l15pdk/nrf54l15/cpuapp:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15pdk_nrf54l15_cpuapp.overlay
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snippets/nordic-flpr/README.rst
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snippets/nordic-flpr/README.rst
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.. _nordic-flpr:
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Nordic FLPR snippet with execution from SRAM (nordic-flpr)
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##########################################################
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Overview
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********
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This snippet allows users to build Zephyr with the capability to boot Nordic FLPR
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(Fast Lightweight Peripheral Processor) from application core.
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FLPR code is to be executed from SRAM, so the FLPR image must be built
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without the ``xip`` board variant, or with :kconfig:option:`CONFIG_XIP` disabled.
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/*
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* Copyright (c) 2024 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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cpuflpr_code_partition: image@165000 {
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/* FLPR core code partition */
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reg = <0x165000 DT_SIZE_K(96)>;
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};
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};
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cpuflpr_sram_code_data: memory@20028000 {
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compatible = "mmio-sram";
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reg = <0x20028000 DT_SIZE_K(96)>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x20028000 0x18000>;
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};
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};
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};
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&uart30 {
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status = "reserved";
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};
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&cpuapp_sram {
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reg = <0x20000000 DT_SIZE_K(160)>;
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ranges = <0x0 0x20000000 0x28000>;
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};
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&cpuflpr_vpr {
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execution-memory = <&cpuflpr_sram_code_data>;
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source-memory = <&cpuflpr_code_partition>;
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};
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snippets/nordic-flpr/nordic-flpr.overlay
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snippets/nordic-flpr/nordic-flpr.overlay
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/*
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* Copyright (c) 2024 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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&cpuflpr_vpr {
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status = "okay";
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};
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&cpuflpr_vevif_remote {
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status = "okay";
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};
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snippets/nordic-flpr/snippet.yml
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snippets/nordic-flpr/snippet.yml
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name: nordic-flpr
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append:
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EXTRA_DTC_OVERLAY_FILE: nordic-flpr.overlay
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boards:
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nrf54l15pdk/nrf54l15/cpuapp:
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append:
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EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15pdk_nrf54l15_cpuapp.overlay
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