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drivers: dac: gd32: use reset API

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Use the reset API to reset the peripheral state before initialization.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2022-08-23 00:12:00 +02:00 committed by Carles Cufí
parent 6894a6c7ed
commit e779767b25
7 changed files with 14 additions and 1 deletions
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5
drivers/dac/dac_gd32.c
View file

@ -8,6 +8,7 @@
#include <errno.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/reset.h>
#include <zephyr/drivers/dac.h>
#include <gd32_dac.h>
@ -29,6 +30,7 @@ LOG_MODULE_REGISTER(dac_gd32, CONFIG_DAC_LOG_LEVEL);
struct dac_gd32_config {
uint32_t reg;
uint32_t rcu_periph_clock;
struct reset_dt_spec reset;
const struct pinctrl_dev_config *pcfg;
uint32_t num_channels;
uint32_t reset_val;
@ -149,6 +151,8 @@ static int dac_gd32_init(const struct device *dev)
rcu_periph_clock_enable(cfg->rcu_periph_clock);
(void)reset_line_toggle_dt(&cfg->reset);
return 0;
}
@ -159,6 +163,7 @@ static struct dac_gd32_data dac_gd32_data_0;
static const struct dac_gd32_config dac_gd32_cfg_0 = {
.reg = DT_INST_REG_ADDR(0),
.rcu_periph_clock = DT_INST_PROP(0, rcu_periph_clock),
.reset = RESET_DT_SPEC_INST_GET(0),
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
.num_channels = DT_INST_PROP(0, num_channels),
.reset_val = DT_INST_PROP(0, reset_val),

1
dts/arm/gigadevice/gd32e10x/gd32e10x.dtsi
View file

@ -97,6 +97,7 @@
compatible = "gd,gd32-dac";
reg = <0x40007400 0x400>;
rcu-periph-clock = <0x71d>;
resets = <&rctl GD32_RESET_DAC>;
num-channels = <2>;
status = "disabled";
#io-channel-cells = <1>;

1
dts/arm/gigadevice/gd32e50x/gd32e50x.dtsi
View file

@ -113,6 +113,7 @@
compatible = "gd,gd32-dac";
reg = <0x40007400 0x400>;
rcu-periph-clock = <0x71d>;
resets = <&rctl GD32_RESET_DAC>;
num-channels = <2>;
status = "disabled";
#io-channel-cells = <1>;

1
dts/arm/gigadevice/gd32f3x0/gd32f350.dtsi
View file

@ -13,6 +13,7 @@
compatible = "gd,gd32-dac";
reg = <0x40007400 0x400>;
rcu-periph-clock = <0x71d>;
resets = <&rctl GD32_RESET_DAC>;
num-channels = <1>;
status = "disabled";
#io-channel-cells = <1>;

1
dts/arm/gigadevice/gd32f4xx/gd32f4xx.dtsi
View file

@ -127,6 +127,7 @@
compatible = "gd,gd32-dac";
reg = <0x40007400 0x400>;
rcu-periph-clock = <0x101d>;
resets = <&rctl GD32_RESET_DAC>;
num-channels = <2>;
status = "disabled";
#io-channel-cells = <1>;

5
dts/bindings/dac/gd,gd32-dac.yaml
View file

@ -5,12 +5,15 @@ description: GigaDevice GD32 series DAC module
compatible: "gd,gd32-dac"
include: [dac-controller.yaml, pinctrl-device.yaml]
include: [dac-controller.yaml, reset-device.yaml, pinctrl-device.yaml]
properties:
reg:
required: true
resets:
required: true
rcu-periph-clock:
type: int
description: Reset Control Unit Peripheral Clock ID

1
dts/riscv/gigadevice/gd32vf103.dtsi
View file

@ -130,6 +130,7 @@
compatible = "gd,gd32-dac";
reg = <0x40007400 0x400>;
rcu-periph-clock = <0x71d>;
resets = <&rctl GD32_RESET_DAC>;
num-channels = <2>;
status = "disabled";
#io-channel-cells = <1>;