Timer "drivers" do not use the device model infrastructure, they are
singletons with a SYS_INIT call. This means they do not have to include
device.h but init.h. Things worked because device.h includes init.h.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).
To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.
All files including CMSIS have been updated.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit addst support for the system timer peripheral which
can be found in Apollo4 SoCs.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
This PR is Calling "clock_control_on" and checking return value
(as is done elsewhere 10 out of 11 times)
CID 322066: Error handling issues (CHECKED_RETURN)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This change introduces the "_rtc_timer" suffix for the system tick timer
driver "compatible" property and aligns naming conventions with the
actual CC13/26xx SoC series product policy.
This frees up the "_rtc" namespace to introduce additional APIs based on
the same peripheral in the future (not part of this PR):
rtc: rtc@... {
compatible = "ti,cc13xx-cc26xx-rtc";
...
timer {
compatible = "ti,cc13xx-cc26xx-rtc-timer";
...
};
counter {
compatible = "ti,cc13xx-cc26xx-rtc-counter";
...
};
pps {
compatible = "ti,cc13xx-cc26xx-rtc-pps";
...
};
};
Or alternatively an MFD pattern with similar requirements.
Fixing the namespacing now makes sense standalone as it reduces the
chance of custom drivers being broken in the future.
Redundant extension of the mandatory system clock devicetree node is
replaced with a single `status = "okay"` which seems to be the more
sensible default to avoid user error when defining custom boards.
Knowledgeable users can still override this if really needed.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Removes duplicate code and inconsistencies in the naming of the
cc13xx_cc26xx devicetree and RTC driver hierarchy and alignes it with
the actual TI product series naming hierarchy.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This driver, due to its limited 24-bits counter, is already tracking a
cycle count in software. Allow that count to be a 64-bits value so this
won't wrap in a matter of only a few seconds when the hardware clock
is fast.
This is very cheap to do as expensive math operations (i.e. divisions)
are performed only on counter intervals whose values fit in 32 bits like
before.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Usage of 64-bit address constants from devicetree without
an UINT64_C wrapping macro results in the following warning
and the cut-off of the address value:
"warning: integer constant is so large that it is unsigned"
This change fixes such issue for PLIC, MTIMER and UART in case
they are used with some 64-bit RISC-V platforms
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
Generic header for system clock allows to define a sys_clock_idle_exit
function for the clock implementation.
Implemented the function in the intel_adsp_timer to reinitialize
device driver after the idle exit state.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
The function `z_nrf_rtc_timer_exact_set` is added to allow
setting compare channel without possible creeping of cc val.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Using EM2 or deeper sleep states (where HF clocks are off) requires
special care if BLE radio is used, since BLE radio relies on that clock,
and its power/clock requirements need to be taken into account
On SiLabs, radio PM is implemented as part of RAIL blob, which relies
on sl_power_manager HAL service. I've implemented SoC PM
state changes using sl_power_manager instead of emlib, and added
call to RAIL PM initialization in Gecko HCI driver.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
Before BURTC is initialized, clock to its APB CSR file is stopped, so
any attempt to read BURTC regs results in BusFault. However,
many parts of Zephyr may call sys_clock getters even before sys_clock
driver itself is initialized. This change adds support for that:
sys_clock_elapsed() and sys_clock_cycle_get_32() simply return 0
if BURTC is not init yet.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
The function to enable wakeup from deep sleep modes is not
available on all SoC's. Hence compile this only when the
wakeup_source property is enabled.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The stm32_lptim_wait_ready() is waiting for the DIEROK flag
with a while loop. It should not be repeated.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This PR will divide the LPTIM clock freq to increase the max timeout.
Only one LPTIM instance is considered for PM timer.
The input freq becomes a fraction of the internal PCLK
source (mainly LSE clock). As the tick per sec does not change,
the minimum lptim counter must always be >0.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Add Gecko BURTC sys_clock driver to handle wake up from EM2,3 states
- Remove custom PM policy and dependency on HAL sl_power_manager service
- EM1 supported in all configurations
- EM2,3 supported only if SysTick is replaced by BURTC
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
Many areas of Zephyr divide and round up without using the DIV_ROUND_UP
macro. Make use of it, so that we make use of a tested system macro and
at the same time we make code more readable.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The init infrastructure, found in `init.h`, is currently used by:
- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices
They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:
```c
struct init_entry {
int (*init)(const struct device *dev);
/* only set by DEVICE_*, otherwise NULL */
const struct device *dev;
}
```
As a result, we end up with such weird/ugly pattern:
```c
static int my_init(const struct device *dev)
{
/* always NULL! add ARG_UNUSED to avoid compiler warning */
ARG_UNUSED(dev);
...
}
```
This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:
```c
static int my_init(void)
{
...
}
```
This is achieved using a union:
```c
union init_function {
/* for SYS_INIT, used when init_entry.dev == NULL */
int (*sys)(void);
/* for DEVICE*, used when init_entry.dev != NULL */
int (*dev)(const struct device *dev);
};
struct init_entry {
/* stores init function (either for SYS_INIT or DEVICE*)
union init_function init_fn;
/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
* to know which union entry to call.
*/
const struct device *dev;
}
```
This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.
**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
init: convert SYS_INIT functions to the new signature
Conversion scripted using scripts/utils/migrate_sys_init.py.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
manifest: update projects for SYS_INIT changes
Update modules with updated SYS_INIT calls:
- hal_ti
- lvgl
- sof
- TraceRecorderSource
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: devicetree: devices: adjust test
Adjust test according to the recently introduced SYS_INIT
infrastructure.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: kernel: threads: adjust SYS_INIT call
Adjust to the new signature: int (*init_fn)(void);
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Syntacore RISC-V platforms have dedicated MTIMER_DIVIDER register which
should be configured during the Timer initialization.
The configuration of dedicated MTIMER_DIVIDER register could now
be performed during initialization if its address is provided.
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
If for any reason the timer counter didn't hold a value close enough to
zero on boot then the cycle delta could overflow and the reported ticks
won't be right. Those who really want the hardware uptime where this
makes sense (as opposed to Zephyr's uptime) can still rely on
sys_clock_cycle_get_64().
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
GPT timer driver previously used "restart mode", where the timer would
count to a given value, then rollover. In this mode, "Any write access
to the Compare register of Channel 1 will reset the GPT counter". Since
a write to the compare register takes affect after 1 cycle of the
module's bus clock, and the bus clock is not synchonized with the GPT
module's low frequency counter clock, writing to the compare register
will induce a counter reset, and can cause the GPT to lose time
synchronization. This can induce time drift over time.
To fix this, rework the GPT driver to use "free run" mode. Note that
free run mode is not used directly, rather the GPT is configured to
reset on a tick boundary at boot, and then the second compare register
is used to set capture points. This way, the GPT interrupt will always
fire at a tick boundary, and no calculations are needed to handle
the counter rollover.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".
Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
- That MIN_DELAY is a magic arbitrary number that is never going to be
right for all cases. Get rid of it in favor of a smarter solution.
- `sys_clock_set_timeout()` should not base its next match value on the
current time. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- Clamp the next timeout to HPET_MAX_TICKS/2. This leaves room for the
added elapsed time and any possible IRQ servicing delay.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add missing guard which prevents use of nrf_rtc_timer on
the same RTC instance (RTC1) as counter driver instance.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
In general, RTC and TIMER driver implements counter API but there
are exception when those peripherals are used in a custom way
(e.g. for system timer or bluetooth). In that case, system must
prevent using counter based on a reserved instance. Previously,
it was managed by Kconfig options but that cannot be maintained
when switching to devicetree configuration of the counter driver.
A new approach removes Kconfig options and instead adds static
asserts in the files which are using direct peripherals. Those
asserts check if given node is not enabled in the device tree.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
System uptime is not getting incremented when TICKLESS_KERNEL is enabled.
This fixes it by changing the clock_annouce and updating
last_count increment accordingly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Make sure that the interrupt and event routing enable bits have the
reset values in case the Zephyr firmware image is chain-loaded.
When started by MCUboot, these registers values aren't the reset values,
but then Zephyr initializes them in same way. Yet, when the Zephyr
firmware image is chain-loaded by nRF5 bootloader, they may have values
that cause the scheduler to behave in unexpected ways.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
Couple issues:
- `sys_clock_set_timeout()` should not base its `mtime` on the current
time either. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- The MIN_DELAY thing is pointless. The hardware performs a signed
comparison. If the delay gets close or even behind current time then
the IRQ will be triggered right away. This is unlikely to happen very
often anyway so the constant overhead is uncalled for.
- Runtime 64-bits divisions on 32-bits hardware are very expensive.
- The timer must be enabled before the count can return a sensible
value during driver init (at least on qemu_cortex_a9).
Discussion in PR #54919 applies here too.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This commit finish to fix the bug describe by 85e2a0679a68f02f7ef.
With the previous correction, the uptime read could be in the past:
if the counter rewinds just after testing ARRM flag, we had lost
some counts.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Several issues:
- `last_count` should not be updated with current time or this will
cause a time drift and induce jitter due to IRQ servicing latency.
- `sys_clock_set_timeout()` should not base its `mtime` on the current
time either. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- The MIN_DELAY thing is pointless. If the delay gets close or even behind
current time then the IRQ will be triggered right away. This is unlikely
to happen very often anyway so the constant overhead is uncalled for.
- Runtime 64-bits divisions on 32-bits hardware are very expensive.
Fix the above, and improve the following:
- Prime the accounting by simply invoking the IRQ handler from the init
code. That will make the "ticks since boot" counter right.
- Remove excessive casts, especially a few wrong ones.
- Simplify the code overall.
Here's the output from the timer_jitter_drift test.
Before this patch:
|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
| expected: 1000 us, 60000.000000 cycles
| min: 907.600000 us, 54456 cycles
| max: 1099.750000 us, 65985 cycles
| mean: 1008.594633 us, 60515.678000 cycles
| variance: 2.184205 us, 7863.136316 cycles
| stddev: 1.477906 us, 88.674332 cycles
|timer start cycle 995589, end cycle 606152369,
|total time 10085946.333333 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 85946.333333 us
After this patch:
|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
| expected: 1000 us, 60000.000000 cycles
| min: 992.116667 us, 59527 cycles
| max: 1030.366667 us, 61822 cycles
| mean: 1000.001902 us, 60000.114100 cycles
| variance: 0.105334 us, 379.201081 cycles
| stddev: 0.324551 us, 19.473087 cycles
|timer start cycle 987431, end cycle 600988572,
|total time 10000019.016667 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 19.016667 us
The mean, variance and standard deviation number differences speak for
themselves, even in the absence of competing ISRs and/or IRQ-disabled
periods which would have made the comparison even worse.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Update machine timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on NIOSV devicetree.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
`#defines` do NOT sepecify a type. They will either adopt a native
system type or type of the value that was passed into the expression.
This can lead to warnings such as, "warning: comparison of integer
expressions of different signedness: 'uint32_t' {aka 'unsigned int'}
and 'int' [-Wsign-compare]".
By casting expressions, such as `MAX_TICKS` to `k_ticks_t`, we can
force the appropriate types and resolve these warnings.
Signed-off-by: Zachary J. Fields <zachary_fields@yahoo.com>
This is a follow-up to commits cf871aec64
and 205e684958.
It turns out that the current implementation of the nrf_rtc_timer may
still fail to properly handle a timeout if that timeout is set in very
specific conditions - when a previously set timeout is about to expire.
When that happens, the new timeout is handled 512 seconds later (when
the system timer overflows) than it should be.
A recently added nrf_rtc_timer test case (test_tight_rescheduling)
exposes this problem and this commit fixes it by adding examination
of COMPARE events that appear during setting of the CC register value
for a given timeout.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This function name is misleading as the absolute time values handled
by the driver are 64-bit and this function receives a 32-bit parameter,
which is supposed to be a CC register value, not the target time.
Correct the name of this function and its parameter, and remove a now
unnecessary masking from its body.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
This is done with a function call for better readability.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The introduction of cc2c05a90c caused
CONFIG_MCUX_LPTMR_TIMER to always be enabled for boards where the NXP LPTMR
is enabled in the board devicetree.
Using this low-power timer as system timer only makes sense when using
power management. Otherwise, it just results in a lower tick resolution and
non-tickless operation.
Add dependency on CONFIG_PM for CONFIG_MCUX_LPTMR_TIMER.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
It is not guaranteed that a multi-core RISC-V hart numbering scheme
will match Zephyr's sequential cpu numbering scheme. Read the hartid and
use that value in calculation to get mtime_cmp reg, instead of the
current_cpu id.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
This is a follow-up to commit 205e684958.
The recently added nrf_rtc_timer test case (test_next_cycle_timeouts)
revealed a problem in the current implementation of this function.
Adjust it to avoid missing COMPARE events in specific circumstances.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add dependency on SYS_CLOCK_EXISTS to all timer configurations.
This would avoid a situation where a possible timer configuration would
be wrongfully selected but SYS_CLOCK_EXISTS is disabled.
This simplifies code that wants to check for system clock capabilities
don't have to check if the system clock exists in addition.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
There is no need to disable interrupts while just checking if
a channel needs to be processed in the ISR, as that section
does not contain anything that needs to be protected against
overwriting from some other context. In particular, if a given
timeout is changed or even aborted while its event is being
checked, this will be correctly handled in the code that follows
and that checks the expiration time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Values to be set to the comparator need to be specified in RTC cycles,
not ticks, so the initial value used in the tickless mode needs to be
MAX_CYCLES, otherwise when CONFIG_SYS_CLOCK_TICKS_PER_SEC is set to
a value less then the RTC frequency, the initially configured timeout
will be unnecessarily shorter.
On the occassion, remove also the call to counter() when setting the
initial timeout value in non-tickless mode. RTC is cleared a few lines
above, so at this point it will most likely be 0, and even if it was
not, compare_set() would properly handle a target time value that had
already passed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In non-tickless mode, the timeout handler always announced maximum 1
tick to kernel, but in fact it cannot be guaranteed that the handler
execution is not delayed and that the number of elapsed ticks does not
exceed 1. Use the actual number instead.
Switch also to using a 32-bit value for `dticks` to get a bit simpler
generated code (ticks delta is not supposed to be that huge).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align the condition checked in compare_set_no_locks() with what
set_absolute_alarm() actually provides (and slightly correct the
latter function so that it provides what it is supposed to).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing masking against `BIT(chan)` when handling a forced ISR
to avoid unnecessary processing of multiple channels instead of just
the one that actually requires it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove a piece of code that was supposed to bring an extra update
of the anchor value but which in fact was not able to provide it,
because of the target time checking performed in process_channel(),
and which is anyway unnecessary because the timeout span is limited
to MAX_CYCLES in sys_clock_set_timeout(), so the timeout handler is
guaranteed to be executed at least twice per each RTC overflow.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Eliminate waiting for a potential COMPARE event when setting a CC
value close to the previously set one and rely instead on checking
target time when processing channel events in the ISR.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unnecessary decreasing of the number of ticks by 1 (it was then
increased by 1 when it was converted to the number of cycles) and add
a comment that clarifies the way that ticks < 1 are handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The stm32 devices shows a x2 factor on the LPTIM1,3,4
clock source but it acts as a prescaler.
The max lptim counter (timebase) is counting 4 sec
In that case, the LPTIM count unit is double.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
hal_espressif systimer HAL calls are based on 1MHz reference.
This changes systimer driver to allow max clocking reference of 16MHz
and increases soc tick resolution by reducing min delay interval.
This also sets all ESP32-C3 socs to 16MHz hardware cycles reference.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Bug occurs when polling kernel uptime. Uptime was suddenly
jumping because lptim counter was counted twice
(from CNT and ARR registers) in case reload happens between
values are fetched.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Switch all imxrt boards to use the systick timer by default, and only
enable the GPT timer when using low power modes. This is desirable
because the systick has a higher resolution, but the GPT can run
while the core clock is gated, making it useful for low power modes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RTC is 24 bit width and k_timer is 64 bit. It is hard to test corner
cases but RTC hardware feature can help here. There is a task which
moves counter to 0xfffff0 which is close to overflow. However, there
is an internal driver state that also needs to be aligned to shift
the time properly. Adding optional function which triggers overflow
and updates internal state. This can be used for testing corner cases.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
CC setting algorithm is handling a case when CC is too soon (next
tick from now). It was setting CC to one tick further in the future
if that was detected. Step was repeated if counter incremented during
setting CC and CC was behind the counter because of risk of setting
CC too late. In certain scenarios we might spend a lot of time in
that loop, especially if optimization is turned off. Test shown that
loop was executed dozens of time (up. to 700us). To prevent
prolonged execution whenever CC setting fails we set CC to one more
tick further in future.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This seems to have caused CI failures and its unclear why just yet
so revert instead.
This reverts commit cbee9e9fdd8060d0ca4e91037b3f99f631e4b1a5.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Update Intel ADSP timer driver to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove setting 'default y' for the timer driver in
Kconfig.defconfig.series as that is now handled in the driver Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Mark the timer as having a lock free read of the cycle count
so that spin lock debugging can include lock time asserts.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Selects the hidden Kconfig to note that the APIC timer's cycle count
accessor is a lock free path and may use the spin lock time limit check.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Select the Kconfig option noting that the cavs (intel adsp)
timer driver provides a lock free cycle count accessor and
therefore can be used with a spin lock time limit assert.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Spin locks held for any lengthy duration prevent interrupts and
in a real time system where interrupts drive tasks this can be
problematic. Add an option to assert if a spin lock is held for
a duration longer than the configurable number of microseconds.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
For 32 bit processor to read the 64 bits hpet counter, the HPET spec
2.4.7 suggest to read HPET counter high and low then checking the
high bits to decide if it rollovers or not.
But this logic seems to cause problem for 64 bits processor under SMP,
there is a possible one tick earier under tickless mode. It is likely
to be the cache coherence issue, because a mfence instruction before
reading the timer works.
So we change to read the 64 bits counter by sys_read64 on 64bit
processor to prevent this issue.
Fixes#49611
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Cleanup soc.h and move interrupt defines into own headers. Rename some
of the defines for ACE to have a unified namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The DW register block was duplicated into the ACE header while we had
the same thing in the driver. Move everything to the driver as the first
step with further improvements planned on top of this.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Some headers made use of types defined in sys_clock.h (e.g. k_timeout_t)
without including it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some files using time_units.h API did not include it, e.g. for
sys_clock_hw_cycles_per_sec.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It is better to use 64-bit variable types for calculating the number
of elapsed ticks than 32-bit variable types. This guards against the
propagation of calculation errors should the lower 32-bits of the timer
counter roll over multiple times before the timer ISR is serviced.
(Such a scenario can easily occur when pausing the system for an
extended period of time with a debugging device such as a Lauterbach.)
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
A specific check is implemented lptim driver in order to ensure global
platform clock/tick configuration is in line with recommendations.
To respect portability principles, don't error out when a config
conflict is detected but generates a warning instead.
Also, since these are only recommendations, provide an option to override
the check. Besides automatically override when ZTEST is enabled, as some
kernel tests specifically configure tick freq to 100.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In some configurations, a udf instruction may be generated
when compiling code where static global variable lptim_clock_freq is
used as a divisor.
To avoid this, initialize variable on declaration so that compiler
could see that it can't be used uninitialized in this division.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
On L0 series, LSI runs at 37KHz while LPTIM driver only supports speeds
up to 32768Hz (to avoid counter overflow). Consequence is a time running
faster than reality (x1.13)
Solution to this is the implementation of the LPTIM prescaler support.
While moving driver configuration from Kconfig to DT, this case was
not taken into account and the effect was LPTIM counter overflow which
consequence is worse than the slightly faster timer.
Reproduce the initial behavior with this piece of code that will be
removed once prescaler support is available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When using LPTIM as tick source, tick freq (SYS_CLOCK_TICKS_PER_SEC)
needs to be adapted to get a precise tick to LPTIM freq ratio.
This adaptation was done easily using Kconfig up to now (under
soc/st_stm32/common/Kconfig.defconfig.series).
Since driver is configured using device tree, this method should
be adapted. For the LSI case (default Kconfig case), rely on the
existing mecanism, which is also still used by OOT users.
For the LSE case, force the value manually in boards forlder.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following transition of lptim timer configuration from Kconfig to DT,
a warning message was set to inform users about this deprecation.
Due to errors in CI this message had to be removed while fixing the related
issues.
Now these issues are fixed, set the deprecation message again.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
