Commit graph

664 commits

Author SHA1 Message Date
Antony Pavlov 05b9bde34a boards: mips: add Qemu Malta support
The MIPS Malta is an ATX form factor evaluation board made by MIPS
Technologies. Malta board is the most popular platform for MIPS
full-system emulation.

See https://www.linux-mips.org/wiki/MIPS_Malta for details.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00
Antony Pavlov 76769a42d0 soc: mips: add Qemu Malta support
The MIPS Malta is an ATX form factor evaluation board made by MIPS
Technologies. Malta board is the most popular platform for MIPS
full-system emulation.

See https://www.linux-mips.org/wiki/MIPS_Malta for details.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Remy Luisant <remy@luisant.ca>
2022-01-19 13:48:21 -05:00
Antony Pavlov 9175ed8244 timer: add support for MIPS CP0 timer
This commit adds a kernel device driver for the MIPS CP0 timer.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00
Antony Pavlov 0369998e61 arch: add MIPS architecture support
MIPS (Microprocessor without Interlocked Pipelined Stages) is a
instruction set architecture (ISA) developed by MIPS Computer
Systems, now MIPS Technologies.

This commit provides MIPS architecture support to Zephyr. It is
compatible with the MIPS32 Release 1 specification.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00
Flavio Ceolin 9dfbde980b codeowners: Add power domains to the list
Add power domains directory and set it to myself.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-01-19 13:35:32 -05:00
Daniel Leung 11c3b1d379 drivers: mm: add skeleton build files and common funcs
This adds skeleton Kconfig/CMakeLists.txt and common implementation
of some sys_mm_drv_*() functions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-18 19:18:30 -05:00
Anas Nashif c025abd035 ci: remove .buildkite
We do not use buildkite since 11/2021. Remove the folder with buildkite
specific files.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-18 13:24:42 -05:00
Yasushi SHOJI 91970adb75 boards: Add Space Cubics OBC Module 1
This is a single board computer for spacecraft OBC (On-board Computer).
It has a Xilinx FPGA with Cortex ARM M3 core with peripherals, UART, CAN
and others.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2022-01-18 13:21:50 -05:00
Gerard Marull-Paretas 412c051fbf codeowners: add GD32 RISC-V boards
Add myself as a code owner for GD32 RISC-V boards.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-01-11 11:50:35 +01:00
Jakub Rzeszutko f37f8a5dd5 CODEOWNERS: update getopt library location
Getopt has been moved from /lib/utils to /lib/posix hence
CODEOWNERS must be updated accordingly.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2022-01-06 21:26:59 +01:00
Immo Birnbaum 10c046ce25 CODEOWNERS: owner for SoC Zynq-7000, board qemu_cortex_a9
Set code ownership for:
- soc/arm/xilinx_zynq7000
- boards/arm/qemu_cortex_a9

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-01-06 11:52:27 -05:00
Lukasz Majewski 23ca8d403a CODEOWNERS: Add entry for stm32 QSPI driver
I would like to add myself (@lmajewski) as the code owner for
stm32's QSPI driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2022-01-04 20:47:29 -05:00
Anas Nashif 0fe74a3f9f MAINTAINER: change microchip maintainer
Change maintainer from scottwcpg to jvasanth1

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-01-04 18:41:05 -05:00
Sylvio Alves 0bebdd9f21 CODEOWNERS: Add myself for ESP32 BT HCI driver
Add myself as codeowner for the ESP32 bluetooth HCI driver

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-01-04 09:08:19 -05:00
Krzysztof Chruscinski a2802d96a2 CODEOWNERS: Adding ztress codeowner
Adding nordic-krch as ztress codeowner.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-01 07:37:22 -05:00
Lingao Meng 422728e156 CODEOWNERS: Add LingaoM for bbc_microbit_v2 board
Add myself as codeowner for the bbc_microbit_v2 driver

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2021-12-24 20:56:29 -05:00
Dominik Ermel ca1cda28f0 CODEOWNERS: Add myself for mgmt/mcumgr/lib
Add myself as codeowner for the mcumgr library.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2021-12-23 11:18:36 +01:00
Nicolas Pitre faa0b2a848 net: introduce a network packet filter framework
This provides the infrastructure to create network packet filter rules
and to apply them to the RX and TX packet paths. Rules are made of
simple condition tests that can be linked together, creating a facility
similarly to the Linux iptables functionality.

A couple of generic and Ethernet-specific condition tests are also
provided.

Additional tests can be easily created on top of this.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-12-21 17:06:35 +01:00
TOKITA Hiroshi 5c7a0ef888 drivers: interrupt-controller: add Nuclei ECLIC driver
Add support for the ECLIC interrupt controller
which is used with the Nuclei processor core.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi c21bc77169 boards: riscv: Add SiPeed Longan Nano platform
SiPeed Longan Nano is a minimal development board
based on GigaDevice's RISC-V processor.
There are 2 board variations.

longan_nano:      GDGD32VF103CBT6 (128K Flash/32K SRAM)
longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM)

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
TOKITA Hiroshi c9c04e491e soc: riscv: Add initial support for GigaDevice GD32V SoC
Add GigaDevice GD32V SoC.
GD32V has non-standard CSR. It doesn't use common startup code.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
Lukas Gehreke 53dea67733 drivers: modem: Added simcom sim7080 modem driver.
Implemented driver for the simcom sim7080 modem.
This driver features Socket offloading, TCP, UDP, DNS,
SMS, GPS and FTP.

Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
2021-12-20 17:48:47 +01:00
Lingao Meng 20fd6e7cd1 CODEOWNER: Add LingaoM for bluetooth mesh stack
Add muself ad codeowner for bluetooth mesh stack

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2021-12-16 11:02:45 -05:00
Kent Hall 24291b86fd CODEOWNERS: Add kentjhall for STM32 counter driver
Add myself as codeowner for the STM32 counter driver.

Signed-off-by: Kent Hall <kjh2166@columbia.edu>
2021-12-15 16:48:44 -05:00
Bartosz Bilas b8ca12ec14 CODEOWNERS: Add bbilas for INA23X driver
Add myself as codeowners for INA23X driver files.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-12-14 13:48:54 -06:00
Henrik Brix Andersen 33121983e9 doc: reference: promote the canbus subsystem documentation
Promote the Controller Area Network (CAN) subsystem reference
documentation from being part of the networking subsystem documentation
to having its own section.

The networking subsystem primarily deals with IP-based networking,
whereas CAN is a subsystem of its own.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-12-13 17:19:26 -05:00
Aymeric Aillet 50540ed594 driver: i2c: TCA9546A: Rename to TCA954x
Prepare the driver to upcoming support of more mux references.
Rename all TCA9546A related files to TCA954x.
Keep ti,tca9546a and ti,tca9546a-channel compatible
for backward compatibility reasons.
New tca954x-base binding embedding common properties,
tca9546a binding inherits from it and define its own compatibles fields.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-12-13 18:07:08 +01:00
Daniel DeGrasse 130f6eb816 drivers: regulator: add i2c regulator driver
This commit adds a generic i2c regulator driver, and enables the NXP
PCA9420 PMIC IC using this driver. The regulator driver also exposes an
additional API in include/drivers/regulator/consumer.h, which allows
drivers to implement support for adjusting voltage levels and current
limits, if their device supports it.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2021-12-08 08:27:44 -05:00
Dmytro Firsov 31b4e4124d xenvm: drivers: serial: Add consoleio Xen serial driver for Domain 0
This commit adds Xen consoleio serial driver. It is needed to receive
kernel messages from Zephyr in case it runs as Xen privileged domain
(Dom0). There is no console ring buffer for such domain, so regular
uart_hvc_xen driver can not be used (privileged domain input/output
are possible only through consoleio interface).

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-12-07 12:15:38 -05:00
Gerard Marull-Paretas 0735160336 codeowners: drivers: timer: include Kconfig files
Make the timer drivers expression more generic to cover both
implementation and Kconfig files.

Missing drivers were added to pass compliance checks. Owners added based
on maintainership, driver author, etc.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-12-04 07:34:53 -05:00
Gerard Marull-Paretas d47700177a scripts: utils: add pinctrl migration script for nRF boards
This script can be used to automatically migrate the Devicetree files of
nRF-based boards using the old <signal>-pin properties to select
peripheral pins. The script will parse a board Devicetree file and will
first adjust that file by removing old pin-related properties replacing
them with pinctrl states.  A board-pinctrl.dtsi file will be generated
containing the configuration for all pinctrl states. Note that script
will also work on files that have been partially ported.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Andy Ross ab1baca03f drivers/ipm: Remove intel_adsp_mailbox driver
This is dead code.  It's based on the cAVS "IPC" mechanism to allow
communication to and from the host CPU.  But there is no test rig in
the Zephyr tree for the protocol defined.  And in fact the only
Zephyr-based user of the IPC mechanism (Sound Open Firmware) has its
own IPC driver and speaks its own protocol with the host kernel.  That
driver needs to migrate into Zephyr soon and this legacy bit is just
confusing.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-11-23 13:23:54 -05:00
Jim Shu 73a957e4b3 codeowners: update codeowners of andes_v5 SoC series
Add Andes developers, kevinwang821020 and jimmyzhe as reviewers for
andes_v5 soc, board, dts, and drivers.

Remove Teng-Shih-Wei from reviewers because he doesn't maintain
Zephyr RTOS currently.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-11-20 16:07:57 -05:00
Wealian Liao 5a9bc389f0 driver: gpio: nct38xx: Add NCT38XX gpio driver support
NCT38XX series, which are i2c-based chips, support a different number
of GPIO functionality. For NCT3807, it has 2 GPIO ports on the same i2c
device address. For NCT3808, it has 2 GPIO ports on different i2c
device addresses. This commit adds NCT38XX GPIO driver support &
provides the interrupt handler for the share alert pin.

The following is NCT3807 devicetree node example:
```
&i2c0_0 {
	nct3807_0: nct3807@70 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nuvoton,nct38xx-gpio";
		reg = <0x70>;
		label = "NCT3807_0";

		gpio@0 {
			compatible = "nuvoton,nct38xx-gpio-port";
			reg = <0x0>;
			label = "NCT3807_0_GPIO0";
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <8>;
			pin_mask = <0xff>;
			pinmux_mask = <0xf7>;
		};

		gpio@1 {
			compatible = "nuvoton,nct38xx-gpio-port";
			reg = <0x1>;
			label = "NCT3807_0_GPIO1";
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <8>;
			pin_mask = <0xff>;
		};
	};
};
```

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-11-20 08:00:38 -05:00
Tim Lin e29a15c0e3 ITE: drivers/serial: add the UART driver for the PM callback function
IT8XXX2 uses shared ns16550.c driver which does not provide a power
management callback(pm_action_cb), so create driver to handle
IT8XXX2 specific UART features.

note: pm_action_cb(old name: pm_control_fn)

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-11-16 21:23:42 -05:00
Ioannis Glaropoulos 2aa9a76700 MAINTAINERS: remove maintainer-ship status for ioannisg
Removing maintainer and/or collaborator status on
- nRF platforms
- TF-M
- userspace
- cmsis-dsp
- MAINTAINERS file

for ioannisg. Replace with @anangl or others, where applicable.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-11-16 20:14:34 -05:00
Aleksander Wasaznik b4bcffb4de CODEOWNERS: Replace joerchan with alwa-nordic
I'm taking over for joerchan at Nordic Semiconductor as a Zephyr
Bluetooth host collaborator.

Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2021-11-16 07:44:40 -05:00
Gerson Fernando Budke 0de934b2a7 scripts: runner: Introduce gd32isp flash runner
Add GigaDevice ISP console flash runner.  This tool enable uses ROM
bootloader to flash devices using serial port.

The GD32_ISP_Console tool can be found at
  http://www.gd32mcu.com/download/down/document_id/175/path_type/1

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-11-07 05:20:50 -05:00
Sylvio Alves d5aa5c2a77 drivers: esp32: uart: use hal functions
In order to have Espressif SoCs working with
the same uart drivers, all low level functions
are now replaced to hal_espressif HAL calls.

This also changes pinmux, gpio and uart
init order to meet its dependencies.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-11-03 16:47:32 -04:00
Krzysztof Chruscinski 9174cd8dbc drivers: watchdog: Add software watchdog based on counter
Added watchdog implementation which is using counter device
to implement watchdog driver API. Watchdog timeout is called from
counter interrupt context. Some counter implementations support
using ZLI interrupt level which can be use here as well. Watchdog
like this can be used along hardware watchdog to cover for its
limitations, i.e. Nordic watchdog resets unconditionally after
62uS after triggering watchdog interrupt. It is not enough time
to dump logging data.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-11-02 13:22:58 +01:00
Dmytro Firsov d9a3efb834 xenvm: drivers: serial: Implement serial interface to Xen PV console
This commit adds minimal support of Xen hypervisor console via UART-like
driver. Implementation allows to use poll_in/poll_out char interface for
uart_console.c driver directly to HV console instead of using Xen
virtual PL011 UART. Future implementation will support interrupt driven
interface on Xen event channels, currently it is under development.

Also this commit introduces early console_io Xen interface, which allows
to receive printk/stdout messages quickly after start, but requires Xen,
built with CONFIG_DEBUG option.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-10-29 15:23:33 +02:00
Immo Birnbaum f668474e4d soc: arm: dts: arm: xilinx: Zynq-7000 SoC init code, device tree data
Add SoC-specific code, the basic device tree and Kconfig data as well
as the corresponding linker command file for the Xilinx Zynq-7000
family of SoCs. This SoC - either as a QEMU simulation or on actual
hardware such as the Avnet/Digilent ZedBoard - is suitable as an ini-
tial target for the ARMv7 Cortex-A support.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-10-28 15:26:50 +02:00
Glauber Maroto Ferreira dcf26d72f5 soc: esp32s2: drivers: flash: add support
to host SPI Flash driver.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-10-28 06:47:21 -04:00
Gerson Fernando Budke 57ca5298b3 CODEOWNERS: Add nandojve for gigadevices
Add myself as codeowners for GigaDevice related files.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-10-28 11:17:25 +02:00
Henrik Brix Andersen 3c6177a445 MAINTAINERS: include the CANopenNode module in the CAN bus group
Include the CANopenNode module integration files in the CAN bus
maintainers group and assign ownership to me.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-10-27 13:44:10 -04:00
Carlo Caione 1976f33e87 drivers: mbox: Introduce MBOX driver class
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.

If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.

This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-10-27 18:27:21 +02:00
Nicolas Pitre bc41234104 ethernet: Synopsys DesignWare MAC driver
This is a driver for the Synopsys DesignWare MAC. It should work
with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x
and 5.x.

This driver uses a zero-copy strategy, meaning that the hardware
reads and writes data directly from/to packet fragment buffers
provided by the network subsystem without first copying the data into
a dedicated DMA bounce buffer.

Platform specific setup is necessary for the hardware to work.
Currently, only the STM32H7X series is implemented and tested.
While this part needs refinement, this driver performs better and uses
far less code space than the HAL-based alternative.

Not yet implemented:

- MDIO (it is WIP, currently relying on default PHY config)
- PTP support
- VLAN support
- various hardware offloads (when available)

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-10-27 10:43:05 -04:00
Gerard Marull-Paretas a0bd3b09ab CODEOWNERS: add myself to pinctrl
Add myself as code owner for pinctrl drivers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Martí Bolívar f259790bf8 dts: bindings: fix file names
Make sure binding file names match their compatibles.

Done with a script.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-10-20 07:33:04 -04:00
David Brown 536f511e63 CODEOWNERS: Add myself and Flavio for Mbed TLS
Add us as maintainers for the Mbed TLS module and associated files.

Signed-off-by: David Brown <david.brown@linaro.org>
2021-10-19 19:30:55 -04:00