Commit graph

58224 commits

Author SHA1 Message Date
Ruibin Chang 0a4708cd2b ITE MAINTAINERS: add tachometer path for compliance check
Add path for drivers/sensor/ite_tach_it8xxx2/*it8xxx2*
and compliance will check it.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2021-11-29 08:25:19 -05:00
Alexandre Bourdiol 102ac1ae36 drivers: clock_control: stm32u5: set voltage scaling VOS for MSIS
In case of MSIS selected as system clock source it is necessary
to set Voltage scaling (VOS) when freqency is greater than 24MHz

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-11-29 05:27:19 -05:00
Alexandre Bourdiol ffb6a31819 drivers: clock_control: stm32u5: keep reset values of MSI trimming
When MSI trimming values where set to 0,
and MSIS is used as system core clock and MSI > 4 MHz,
it causes uart to fail.
There is no need to set thoses trimming values.
So keep the default reset value. (keep ST Factory calibration)

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-11-29 05:27:19 -05:00
Alexandre Bourdiol 2d223bdc8f drivers: clock_control: stm32u5: rework MSIS as system clock source
Because on stm32u5 MSIS is the default clock after reset,
changing MSIS range means immediate frequency change.
Thus it is important to do it after flash latency change
in case of higher new frequency.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-11-29 05:27:19 -05:00
Alexandre Bourdiol 20e46c240c include: drivers: clock_control: stm32u5 missing MSIS define
Missing definition of STM32_SYSCLK_SRC_MSIS
especially needed for STM32U5

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-11-29 05:27:19 -05:00
Gerard Marull-Paretas 51df9fc8d9 soc: arm: st_stm32: stm32u5: fix pm_power_state_set
Some PM cases were not handled correctly (missing default statement).
The error was caught by CI while doing other PM related work.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-29 11:08:38 +01:00
Gerard Marull-Paretas 89a4f36fc8 device: remove inclusion of pm/device.h
The device PM subsystem _depends_ on device, not vice-versa. Devices
only hold a reference to struct pm_device now, and initialize this
reference with the value provided in Z_DEVICE_DEFINE. This requirement
can be solved with a forward struct declaration, meaning there is no
need to include device PM headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-29 11:08:38 +01:00
Gerard Marull-Paretas 84cb35cc04 drivers: timer: remove declaration for non-existing function
The clock_device_ctrl function is no longer available, so remove its
declaration.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-29 11:08:38 +01:00
Anas Nashif 8b55275d48 ci: test_plan: fix pylint warnings
Fix some of the warnings reported by pylint.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-11-28 20:35:40 -05:00
Anas Nashif b3ca5ab82b actions: twister: limit daily job to 60 builders
Keep some builders available for pull requests.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-11-28 20:35:40 -05:00
Anas Nashif 8459757f16 actions: twister: do not schedule on non main branches
We do not want to schedule jobs on branches other than the main branch.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-11-28 20:35:40 -05:00
Anas Nashif aa04df6cd5 actions: twister: upload testplan as an artifact
Upload test plan file as an artifact for later verification.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-11-28 20:35:40 -05:00
Anas Nashif 798a66fdaf actions: twister: load modules from cache
We have a local cache, so tell west to clone modules from cache if
available.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-11-28 20:35:40 -05:00
Anas Nashif 053cc9fe62 actions: twister: run tests on all platforms when changed
When tests are changes, run them on all supported platformed, not only
integration platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-11-28 20:35:40 -05:00
Anas Nashif f856f69202 actions: twister: apply a new strategy from smaller test plans
When the number of tests is smaller, but not too small, we still run on
10 builders, if the test is small enough however, we will determine the
number of builders automatically.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-11-28 20:35:40 -05:00
Torsten Rasmussen a1c49be42e cmake: ZEPHYR_MODULES_NAMES list created before ext-root
Create the ZEPHYR_MODULES_NAMES list of zephyr modules present in the
system before calling roots defined in `MODULE_EXT_ROOT`.

This will allow external module roots to process based on Zephyr modules
available in the system.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-11-27 13:07:09 +01:00
Dino Li f1f0dadad3 driver: espi: it8xxx2: enable ESPI_OOB_CHANNEL
This enable eSPI out-of-band channel.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-11-26 10:26:52 -05:00
Jair Jack 0b06a06814 net: lwm2m: Supported Protocol to pull firmware update must be optional
The supported protocol must be delivered to the firmware update object
as optional, then configured in the application.

This information is device/server dependent so does not can be fixed
in library.

Signed-off-by: Jair Jack <jack@icatorze.com.br>
2021-11-26 10:26:32 -05:00
Vinayak Kariappa Chettimada 2af787f28e tests: Bluetooth: Update to use Periodic Advertising enable ADI flags
Update Babblesim test to use Periodic Advertising enable and
ADI flags.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-11-26 10:26:17 -05:00
Vinayak Kariappa Chettimada 121373167a Bluetooth: Controller: Fix to use ADI flag in Periodic Adv Enable
Fix implementation to use ADI flag in Periodic Advertising
enable command to add ADI field in Periodic Advertising
PDUs.

Related to commit 6433a6aac1 ("Bluetooth: Controller:
Add Periodic Advertising ADI support").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-11-26 10:26:17 -05:00
Vinayak Kariappa Chettimada 9d84f7727b Bluetooth: Add defines for Periodic Advertising Enable and ADI support
Add defines for Periodic Advertising Enable and ADI support.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-11-26 10:26:17 -05:00
Erwan Gouriou 6026d3c5bf drivers/pinmux|pinctrl: stm32f1: Fix broken cast in remap
remap information is coded in 10 bits, uint16_t should be used
to cast it.

Fixes #40688

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 10:25:41 -05:00
Aleksandr Khromykh b5725061d2 MAINTAINERS: add alxelax as Bluetooth Mesh collaborator
Add alxelax as Bluetooth Mesh collaborator.

Signed-off-by: Aleksandr Khromykh <Aleksandr.Khromykh@nordicsemi.no>
2021-11-26 10:14:41 -05:00
Gerard Marull-Paretas a8c93478db soc: arm: nordic_nrf: move soc_nrf_common.h to common folder
Since the addition of pinctrl the common folder is added to the Zephyr
include path. This can be re-used to place the soc_nrf_common.h header
in the common folder and include it directly, without the need of
relative paths.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas a6520ad690 samples: boards: nrf: dynamic_pinctrl: initial version
Add a sample that shows how dynamic pin control can be useful to remap a
peripheral to a different set of pins.

NOTE: default pin configuration is provided for the nRF52840-DK board.
Such configuration will be removed once all nRF-based boards are ported
to pinctrl.

Thanks to Francesco for documentation suggestions.

Co-authored-by: Francesco D. Servidio <francesco.servidio@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas ed67eb28b8 drivers: gpio: nrfx: adjust initialization level and priority
Make nrfx GPIO driver part of the PRE_KERNEL_1 initialization stage. As
a result, the GPIO driver can now be initialized before UART if
required, a device that is also initialized during PRE_KERNEL_1.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas 51751909f5 tests: drivers: pinctrl: add test for checking nRF DT parsing
Add a unit test that allows to validate if pin control configuration
stored in Devicetree is parsed correctly.

nRF boards used to run this test should add the pinctrl:nrf tag.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas d47700177a scripts: utils: add pinctrl migration script for nRF boards
This script can be used to automatically migrate the Devicetree files of
nRF-based boards using the old <signal>-pin properties to select
peripheral pins. The script will parse a board Devicetree file and will
first adjust that file by removing old pin-related properties replacing
them with pinctrl states.  A board-pinctrl.dtsi file will be generated
containing the configuration for all pinctrl states. Note that script
will also work on files that have been partially ported.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas 5567d7ae07 drivers: serial: nrfx_uart: add support for pinctrl
This patch adds support for the new pinctrl API to the UART driver. The
old pin property based solution is still kept so that users have time to
transition to the new model.

Notes:

- A new property to disable RX has been introduced: disable-rx. It is no
  longer possible to do it automatically depending on pin information,
  since it's not available when using pinctrl.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas 3b7215e160 drivers: serial: nrfx_uarte: add support for pinctrl
This patch adds support for the new pinctrl API to the UARTE driver. The
old pin property based solution is still kept so that users have time to
transition to the new model.

Notes:

- Some build assertions cannot be performed since the driver does not
  have direct access to pin settings anymore. As a result user will not
  be notified if HWFC is enabled but RTS/CTS pins are not configured.
- Hardware flow control can be enabled regardless of pin configuration,
  it is now up to the user to configure RTS/CTS pins in DT.
- Some RX enable checks that were performed using pin information has
  been replaced with a DT property that informs if RX is enabled or not.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas 6399ad50f4 drivers: pinctrl: nrf: add support for uart/uarte peripheral
Add support for configuring UART/UARTE peripheral pins.

Co-authored-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas 22c8c02145 drivers: pinctrl: nrf: initial support
Add initial support for nRF pin controller driver. The implementation in
this patch does not yet support any peripheral. Only states
representation and basic driver functionality is introduced.

Note:
The nrf_pin_configure function has been marked as __unused since it may
not be used in certain scenarios until all peripherals are supported by
the pinctrl driver. For example, if only UART/E is supported but the
board does not enable UART, the function will never get called. However,
that board will likely have other peripherals that will gain support in
the future.

Thanks to Marti Bolivar for bindings documentation.

Co-authored-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Johann Fischer 5aedcabf51 drivers: spi_context: fix null pointer dereferencing
commit 54907c7014
("drivers: spi: spi_context: improve support of multiple cs gpios")
added function to initialize all CS GPIOs defined in devicetree.
This function, spi_context_cs_configure_all, is intended to be
called during SPI driver initialization (POST_KERNEL init level).
It is also obvious that a SPI driver was not used at that time,
and no bus configuration (struct spi_config) is assigned to
SPI bus (spi_context.config).

The spi_context_cs_configure_all function has a homeopathic
ASSERT to validate CS levels, which causes a null pointer
dereferencing by ctx->config->operation if asserts are
enabled.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-11-26 11:47:27 +01:00
Erwan Gouriou dd0b133a62 samples/drivers: led_pca9633: Replace target stm32373c_eval
Pinctrl is missing in i2c1 device description on stm32373c_eval
ovderlay file, besides using I2C1 this board (as mentioned in readme)
requires to remove 2 resistors on the board.

Make it simple and instead use a board with arduino_i2c port
available.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 1eb28e7741 boards: stm32: Fix incomplete nodes descriptions
Now that pinctrl-0 property is required in descriptions of nodes
that implies definition of pins, these incomplete nodes definitions
lead to build error.
Fix or remove depending of the board documentation.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 33ec1759ca boards: stm32l5: Refactor serial peripheral descriptions
On stm32l5 based boards, some serial devices descriptions were
scattered between common.dtsi and base or non secure dts files.

This leads to build issues now that pinctrl-0 and pinctrl-names
properties are required but this was anyway broken since the
beginning.

Group all serial devices definition in common.dtsi so complete devices
description is available to both non secure and base descriptions.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou f18a4aa6cc dts/arm/st: mp1: Default node status should be "disabled"
Set SPI nodes status as disabled, as this should be the in .dtsi
soc description.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 37bf7cbe4f dts/bindings: stm32: Set pinctrl-[0/names] properties as required
Now that STM32 drivers are using pinctrl API, set pintrl-0 and
pintrl-names properties as required in order to report malformed
nodes description soon at build stage and avoid cryptic
DT api build error messages.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 955ef39623 boards: stm32: Remove use of CONFIG_PINMUX
Now that all drivers and all boards have been converted to the
use of PINCTRL, remove usage of PINMUX.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou eff3ad6df7 drivers/pwm: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.
Since STM32F1 series require pinctrl option and required register
address is parent timer address in place of own node register address,
use PINCTRL_DT_INST_CUSTOM_REG_DEFINE in place of usual
PINCTRL_DT_INST_DEFINE for this specific series.

Additionally, remove the automatic selection of PINMUX API.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 1d14517ede boards: arm: stm32: add pinctrl state name for PWM peripheral
Add the pinctrl state name (default) for the PWM peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 90b0e92540 drivers/usb/device: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.

Additionally, rename usb_pinctrl to usb_pcfg to better fit
new pinctrl API.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou ad4e5d85fe boards: arm: stm32: add pinctrl state name for USB peripheral
Add the pinctrl state name (default) for the USB peripherals.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 8bd410a589 drivers/spi: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 1c66ccdac3 boards: arm: stm32: add pinctrl state name for SPI peripheral
Add the pinctrl state name (default) for the CAN peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou ab893d5fef drivers/memc: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou ab306b34db boards: arm: stm32: add pinctrl state name for FMC peripheral
Add the pinctrl state name (default) for the FMC peripherals.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 79943f647f drivers/i2s: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou 895e1ddb69 boards: arm: stm32: add pinctrl state name for I2S peripheral
Add the pinctrl state name (default) for the I2S peripherals.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00
Erwan Gouriou f21de9dfe6 drivers/i2c: stm32: use new pinctrl API
Use the new pinctrl API to configure pins.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-26 11:36:42 +01:00