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17 commits

Author SHA1 Message Date
Wilfried Chauveau af3a19106a soc: arm: fix missing configs & defines
Some SoC have missing feature selections in their Kconfig.
Some others are missing includes of CMSIS-Core headers.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
2023-12-05 10:19:15 +00:00
Torsten Rasmussen 4812884f84 cmake: arm: update arm SoC to use SOC_LINKER_SCRIPT variable
This commit updates all arm SoCs to set SOC_LINKER_SCRIPT CMake
variable to point to active linker script directly.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2023-11-03 11:01:23 +01:00
Huifeng Zhang 2c22e83dfb include: arch: arm: Remove aarch32 directory
This commit follows the parent commit work.

This commit introduces the following major changes.

  1. Move all directories and files in 'include/zephyr/arch/arm/aarch32'
    to the 'include/zephyr/arch/arm' directory.

  2. Change the path string which is influenced by the changement 1.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2023-09-13 10:08:05 +01:00
Gerard Marull-Paretas 9c961571a2 modules: cmsis: move glue code to modules/cmsis
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).

To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.

All files including CMSIS have been updated.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-08-24 13:20:21 +02:00
Wojciech Sipak 69d0f03ebd soc: quicklogic_eos_s3: remove unneeded code
Pinmuxing is now done by a pinctrl driver, not by board.c,
so the code used previously for pinmuxing can be removed.

Fixes #59186.

Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
2023-07-26 14:59:59 +02:00
Wojciech Sipak bff69f5384 drivers: pinctrl: add driver for EOS S3
This adds a new pinctrl driver for Quicklogic EOS S3 SoC

Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
2023-07-26 14:59:59 +02:00
Gerard Marull-Paretas fcaa259e22 soc: arm: remove all unnecessary NMI_INIT() calls
NMI_INIT() is now a no-op, so remove it from all SoC code. Also remove
the irq lock/unlock pattern as it was likely a cause of copy&paste when
NMI_INIT() was called.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-07-05 09:15:36 +02:00
Gerard Marull-Paretas a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Michal Sieron 6423e7db38 soc: arm: eos_s3: Use frequency from Kconfig to configure main clock
Allows applications to use other frequencies than 60 MHz.
For example 48 MHz for USB communication with usbserial driver.

Signed-off-by: Michal Sieron <msieron@antmicro.com>
2022-10-20 15:41:09 +02:00
Kumar Gala 9a501e0922 serial: remove Kconfig.defconfig setting of serial drivers
Now that serial drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the serial.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-26 09:29:24 -05:00
Kumar Gala 600d749cf3 gpio: remove Kconfig.defconfig setting of GPIO drivers
Now that gpio drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the GPIO.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-26 08:49:38 +02:00
Kumar Gala 2d88414c4e drivers: serial: pl011: Remove unused Kconfig symbols
The driver has be DT_INST based for a while so the Kconfig
symbols CONFIG_UART_PL011_PORT0<n> aren't used.  So lets
remove them.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-21 16:40:28 +00:00
Gerard Marull-Paretas d342e4c4c1 linker: update files with <zephyr/...> include prefix
Linker files were not migrated with the new <zephyr/...> prefix.  Note
that the conversion has been scripted, refer to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas 0e69129fb3 soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
Gerard Marull-Paretas e5e73a70e9 soc: remove unnecessary inclusions of devicetree.h
Many ARM SoCs included <devicetree.h> likely due to:

1. nvic.h not being self-contained
2. As a result of copy-paste

Some RISC-V SoCs had the same problem, in this case likely due to
copy-paste from ARM. The <devicetree.h> header has been removed using
the following command:

sed -i ':a;N;$!ba;s/#include <devicetree\.h>\n//g' soc/**/soc.h

soc.h files that make a legitimate usage of the API have not been
changed.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-11 11:52:27 +01:00
Wojciech Tatarski 35dd66b6c4 drivers: gpio: add EOS S3 GPIO driver
Add GPIO driver for QuickLogic EOS S3 SoC.

Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2021-03-11 08:58:20 -05:00
Jan Kowalewski 36ba3d4abd soc: add EOS S3 SoC
Add basic port for QuickLogic EOS S3 SoC.

Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2020-09-04 14:48:49 -04:00