Allow this sample in native_sim, and set it as default
integration platform instead of native_posix.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
native_posix and native_sim are already excluded thru
the lack of required tags.
Let's remove the platform exclude instead of adding also
native_sim to it explicitly.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Replace the references to native_posix with native_sim,
and update link names accordingly.
Background: during this release native_sim is replacing
native_posix as the main host test/development platform.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix include order between platform_ns and tfm_api_ns libraries.
platform_ns functions may depend on tfm_api_ns.
This would typically be platform specific IOCTL services added to the
platform_ns library requiring the tfm_platform_ioctl from the
TF-M platform partition exposed in tfm_platform_api.c
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Drop the input_ prefix fromthe internal functions. Trying to unify the
input drivers to use the same style for function naming, this makes it a
bit more compact and makes it easier to distinguish the common keyboard
structures and functions from the driver ones.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
On xtensa architectures the string "ZEPHYR FATAL ERROR"
comes after the coredump itself. The ordered regex will
incorrectly fail for this arch.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add configuration lines to be able to use the jlink debugger with this
board. The disco board leaves the debug lines tri-stated until connecting
to stlink, so it is safe to just plug in the jlink and use it.
Signed-off-by: David Brown <david.brown@linaro.org>
Add a missing c-file (buf_simple.c) and use a dedicated label for
Networking Buffers. Also add explicit excludes of the same files to the
Networking section. Without the dedicated label it seems that the wrong
maintainer gets set as assignee for pull requests.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use __nocache_noinit for the Bosch M_CAN MRAM data variables on SoCs
without dedicated MRAM.
Fixes: #64691
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Allow tagging variables with __nocach_noinit.
With CONFIG_NOCACHE_MEMORY=y, this will resolve to __nocache, which implies
__noinit. With CONFIG_NOCACHE_MEMORY=n, this simply resolves to __noinit.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Include the zephyr/dsp/types.h header for float32_t/float64_t type
definitions to avoid conflicts with other subsystems including this header.
Add compile-time asserts to ensure the typedefs meet the requirements of
the CANopenNode module.
Fixes: #63896
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Previous implementation didn't work if CONFIG_LOG_PROCESS_TRIGGER_THRESHOLD
was set to 1. Minmimum value that worked was 2. A value of 1 would
just be ignored and act like 0 with threshold triggerring disabled.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Set Spi StateIndex equal to index of DT Spi node.
Because number of State array is set base on
number of DT Spi node used. If StateIndex is set
equal to Spi instance, StateIndex can be over array.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Add alias "FEATURE_SIUL2_MAX_NUMBER_OF_INPUT"
for compatibility with with previous RTD versions.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Provide the CONCAT macro as a general Zephyr utility macro
to paste two tokens during the preprocessor pass.
Note that this macro is based on the _CONCAT macro defined
in toolchain/common.h. This toolchain header needs a CONCAT
like macro, but requires minimal include dependencies.
So we leave _CONCAT where it is.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
One of the ARM architure files, defined since long ago
CONCAT and TOSTR having the exact same purpose as Zephyr's
_CONCAT & STRINGIFY.
This arm header file is included thru dependencies into
almost all code built for ARM, which leads to these
macros being usable everywhere.
This can easily make developers belive the macros
are provided by Zephyr itself, and use them, leading
to code which is not portable between architectures.
Remove this macros definitions from the architecture
headers.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
One of the ARM architure files, defined since long ago
TOSTR having the exact same purpose as Zephyr's STRINGIFY.
Remove the use of this macro in the tree
(only used in another ARM header file) in favour
of STRINGIFY.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
nRF5340 SoC has `TASK_STOP` this patch implements disabling
watchdog for that SoC.
Changed body of `wdt_nrf_setup()` to utilize `nrfx_wdt_reconfigure()`
driver API.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Fixes an unhandled interrupt runtime crash if CONFIG_SPI_XMC4XXX_DMA=y and
CONFIG_SPI_XMC4XXX_INTERRUPT=n.
The unhandled interrupt error is triggered because irq_enable() was called
without calling IRQ_CONNECT() when CONFIG_SPI_XMC4XXX_INTERRUPT=n.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
In the interrupt driven spi, spi_context_update_tx() is called once
from the calling thread and then once in spi_xmc4xxx_isr() after each
new byte is received. This actually means that there is one extra call to
spi_context_update_tx(). This is fine if spi_context_update_tx() complete
it's call in the calling thread before the interrupt fires, however, this
cannot be guaranteed especially if the calling thread is pre-emptive and
has a low priority.
Fix this by calling spi_context_update_tx() in the calling thread before
transmitting the first byte.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Add Verdin iMX8M Plus board with i.MX8MP SoC and ARM Cortex-M7 processor.
Add two targets (DDR and ITCM) for the iMX8M Plus board.
Port and documentation are based on NXP MIMX8MM EVK board.
This code is intented to be used with the Cortex-M7.
Signed-off-by: Gabriel Freitas <gabriel.freitas@toradex.com>
Add support for UART1 usage by adding uart1 node and configuration
to the i.MX 8ML devicetree include.
Signed-off-by: Gabriel Freitas <gabriel.freitas@toradex.com>
Replace one of the dynamic threads with a static thread to show the
all the possible ways of creating threads.
Signed-off-by: Vilem Gottwald <xvigo.dev@gmail.com>
This commit has no functional changes. It makes the comments up to date
with the code and changes the code structure to ensure consistency.
These inconsistencies were introduced when the static thread definition
was replaced with dynamic, but the comments remained unchanged.
- Fixed outdated comments about the static approach that were
not corresponding to the code.
- Rearrange thread definitions, to obtain similar code structure
for both threads.
Signed-off-by: Vilem Gottwald <xvigo.dev@gmail.com>
Both MPSC and SPSC should be under data structure API group
instead of kernel API group. So move them, and fix some doxygen
cosmetic grouping issues for SPSC.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Another round of repeated words cleanup. This commit tries to keep the
diff minimal and line wrapping was mostly left intact in the touched
files, as having them consistent across the documentation is probably
the topic of a future tree-wide cleanup (or not)
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Sync the spelling.txt file with a recent version of the one found in
Linux kernel.
List sorting was preserved (however inconsistent it might be) to
simplify future syncs.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Somehow this is seems to be a very common typo. Adding it to spelling.txt
to catch it as part of compliance check.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Get GPR base address using nodelabel as this will align for all the
current in tree platforms. Currently inst 0 of the compat gets wrong
node and base address on RT11xx.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
GPR17 calculation for configuration of RAM banks is incorrect,
bit shift should be 2 per idx, not 1, this is major bug that needs
correcting, currently all RT boards are affected with wrong
configuration.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Log string removal is by default enabled for RISCV and Cortex-M
and support is added to the default linker template. However, if
SoC is not using default linker template then DEVNULL_REGION is
not defined. In that case string removal cannot be used.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Currently, the NXP S32 SoCs have three redundant Kconfig hidden
options to define the part number. To streamline this, we will
retain `CONFIG_SOC_PART_NUMBER` to store the part number as a
string and `CONFIG_SOC_PART_NUMBER_<part>` that can be selected
by the boards.
Furthermore, for drivers requiring conditional code compilation
based on the target SoC, they should utilize the series or SoC
config option as applicable, instead of the part number config.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The existing S32K3 Kconfig options employ the `M7` suffix, which is
redundant given that all cores in this series utilize an Arm Cortex-M7
core. Therefore, we should remove it.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
To accommodate support for S32K1 devices, it is necessary to rename
the existing `s32k` directory, which currently houses support for
the S32K3 series, to align with the respective series names. This
adjustment is necessary given the distinct differences in core
architecture, MPU, peripherals, and other key aspects between
the two series.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
`smp_shell_input_timeout_handler`. Create a public function in
the `shell_uart.c` for it to get the pointer to the
`smp_shell_data` and fix the compilation error.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The ipc/pbuf was tagged as kernel API, which is not correct.
As this is for IPC, move it under IPC doxygen group and also
give it its own subgroup. So now the packed buffer API appears
under IPC in API doc.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
