Commit graph

8755 commits

Author SHA1 Message Date
Yves Vandervennet 3848fb82b8 boards: mimxrt1050_evk: enable linkserver support
- adds the definitions in the board.cmake file
 - updates documentation

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2024-01-12 15:40:53 -05:00
Alberto Escolar Piedras cf54f9acf9 boards nrf52_bsim: Allow running uart tests in this board
Let's allow the uart tests to run in this board

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-12 11:27:23 -06:00
Toon Stegen c860542cf1 boards: suppress dtc warning for SPI bridge on ST
Get rid of warnings

Signed-off-by: Toon Stegen <toon@toostsolutions.be>
2024-01-12 11:25:19 -06:00
Charles Dias 13671813fe boards: arm: Add support for FK7B0M1-VBT6 board
Adds the device trees, Kconfig, and documentation files.

The following features have been confirmed working on hardware:
* LED
* Button
* UART

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
2024-01-12 16:03:01 +00:00
Derek Snell 8d8d3a53c0 boards: arm: mimxrt595_evk_cm33: add power profiles
Power profiles enable the app to dynamically switch modes and support
DVFS.  These profiles leverage the PCA9420 PMIC to change the VDDCORE
voltage, and optimize power consumption.  Two runtime profiles are
provided for the application:
* main_clk sourced from FRO192M, VDDCORE at 0.9 V
* main_clk sourced from FRO96M,  VDDCORE at 0.8 V

Both profiles use the FRO, and the FRO is retrimmed with the target
frequency when switching profiles.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2024-01-12 10:00:00 +01:00
Martin Kiepfer 51e5ecf829 board: m5stack_stamps3: Add support for M5Stack StampS3 development board
Adding support for M5Stack StampS3 development board, featuring an ESP32
MCU

Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
2024-01-12 09:59:41 +01:00
Anisetti Avinash Krishna 0e87de0a10 dts: x86: intel: alder_lake: Added UARTs DMA instances
Added UARTs DMA instances to enable Async operations on
ADL platform

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2024-01-11 15:41:42 -06:00
Henrik Brix Andersen 1b0ea02ffb boards: shields: mikroe_adc_click: use board with mikroBUS as example
Use a board with a mikroBUS as example in the shield documentation and
update the example application since the board_shell sample was removed in
commit 7c85f4b2f5.

Fixes: #67134

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-11 17:32:28 +01:00
Henrik Brix Andersen 1798a7b5a2 boards: shields: mikroe_adc_click: include zephyr/dt-bindings/adc/adc.h
Include zephyr/dt-bindings/adc/adc.h in the shield DTS overlays to simplify
using this shield in application overlays.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-11 17:32:28 +01:00
Henrik Brix Andersen d2c6fcfd32 boards: shields: mikroe_adc_click: fix lpcxpresso55s16 overlay
Remove the correct nodelabel in the overlay for the lpcxpresso55s16 board.

Fixes: 07b642d94f

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-11 17:32:28 +01:00
Henrik Brix Andersen 735c9e23ec boards: arm: nucleo_g474re: list FDCAN1 as supported in the docs
List FDCAN1 as supported in the board documentation.

Fixes: #67087

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-11 12:52:00 +01:00
Henrik Brix Andersen fcef0607ca boards: arm: nucleo_g0b1re: list FDCAN1 as supported in the docs
List FDCAN1 as supported in the board documentation.

Fixes: #67087

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-11 12:52:00 +01:00
Ettore Chimenti 3557bfeb60 boards: stm32f3_seco_d23: update name and refs
Due to board name change (JUNO -> SBC-3.5-PX30), it is necessary to
update board names, links and references in files and documentation.

Signed-off-by: Ettore Chimenti <ek5.chimenti@gmail.com>
2024-01-11 11:17:18 +00:00
Henrik Brix Andersen d7873e25fd boards: arm: stm32h735g_disco: enable CAN suppport
Enable support for FDCAN1, FDCAN2, and FDCAN3 on the stm32h735g_disco
board.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-10 20:59:55 -05:00
Henrik Brix Andersen bc69500b0e drivers: can: stm32h7: fdcan: add support for domain clock and divider
Add support for specifying the domain/kernel clock along with a common
clock divider for the STM32H7 CAN controller driver via devicetree.

Previously, the driver only supported using the PLL1_Q clock for
domain/kernel clock, but now the driver defaults to the HSE clock, which is
the chip default. Update existing boards to continue to use the PLL1_Q
clock.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-10 20:59:55 -05:00
Gerard Marull-Paretas 0f73e8fd3e dts: arm/riscv: gigadevice: s/gigadevice/gd
To stay consistent with other vendors, use vendor prefix (gd).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-10 20:59:21 -05:00
Mateusz Holenko e3deb44bc4 boards: arduino_portenta_h7: enable mailbox
The mailbox peripheral is actively accesses by stm32_hsem functions,
so it should be marked as enabled in DTS.

Signed-off-by: Mateusz Hołenko <mholenko@antmicro.com>
2024-01-10 20:57:24 -05:00
Dawid Niedzwiecki 10e66dc9fc boards: google_dragonclaw: limit frequency of an unused clock
I2S is unused on the dragonclow board. Increase the R division factor
(used for I2S), to reduce the clock frequency, which saves some power.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2024-01-10 18:24:05 +00:00
Ali Hozhabri af76d061f8 boards: arm: Update dts files for ST BlueNRG-based boards
Update dts files to use ST vendor specific HCI SPI Bluetooth driver.

Remove unnecessary GPIO bias for output pins.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2024-01-10 15:07:36 +01:00
Gerard Marull-Paretas 5b3dd2288e boards: gd32f403z_eval: remove redundant Kconfig
Board does not have any init code, so BOARD_INIT_PRIORITY is redundant.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-10 15:05:54 +01:00
Gerard Marull-Paretas d4838ed57e boards: gd32f450i_eval: remove unused Kconfig
Board no longer has init code.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-10 15:05:54 +01:00
Gerard Marull-Paretas 81dbe94a16 boards: gd32*: reduce board image file size
Some GD32 board pictures exceed the maximum allowed limit (100K), so
reduce them.

Automated using `cwebp path/to/board.jpg -o path/to/board.webp`

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-10 15:05:54 +01:00
TOKITA Hiroshi 4266a7e17a boards: arm: adafruit_kb2040: add led-strip configuration
Adafruit KB2040 has one NeoPixel(WS2812) LED that
attaches to GPIO17 pin.
Add configuration for it.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-01-10 12:10:36 +01:00
Maximilian Huber 47e4728604 doc: add note that some versions of displays are not supported
This adds a hint that for stm32h747i_disco just some display shields are
supported.

Signed-off-by: Maximilian Huber <gh@maxhbr.de>
Co-authored-by: Benjamin Cabé <kartben@gmail.com>
2024-01-10 11:07:41 +01:00
Alberto Escolar Piedras 2f25cd5851 boards nrf52_bsim docs: UART is now supported
Add the UART to the list of supported peripherals

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras 0aa0bc9af0 boards nrf*bsim: Move common kconfig selection to common place
Reduce a bit the amount of boilerplate by placing common
Kconfig selections in common options.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras 6fee105b1d boards nrf52_bsim: Provide default UART configuration
Provide a good enough UART configuration, but do not
select it as backend by default, let apps do that.

The UART and its driver are very heavy compared to
other backends it may replace, so let's avoid
enabling it by default.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras 0bdf943900 boards nrf*_bsim: Do not use the UART for logging by default
Even if the UART is enabled, let's not use it by default,
in this platform, as this UART is not meant for user
interaction, but to connect other devices
(for ex. BT controller).

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras f84ef2d6ee boards nrf5*_bsim: Allow using the UART
Now the HW models include the UART(E) models.
So let's allow selecting it, but let's
not default to it, or enable it by default,
as it is only in very rare cases uses will want it,
and some may already be using the native ptty
instead.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras 572ba26b1f boards nrf5*_bsim: Provide more common headers
Provide some more common headers some nRF drivers
expect.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras efca307d35 drivers uart_nrfx: Correct pinctrl reg address for simulation
For simulation, we cannot get the UART regiter address
for the pinctrl config structure from DT, as that
cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Henrik Brix Andersen df83fffc7c boards: shields: lmp90100_evb: include relevant dt-bindings headers
Include zephyr/dt-bindings/adc/adc.h and zephyr/dt-bindings/gpio/gpio.h in
the shield DTS overlays to simplify using this shield in application
overlays.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-09 10:04:18 +01:00
Henrik Brix Andersen 1ebaa293a1 dts: bindings: adc: ti: lmp90xxx: use common io-channel-cells naming
Use the common io-channel-cells name "input" instead of "positive" and
"negative" to make this binding work with the various ADC DT macros.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-01-09 10:04:18 +01:00
Philip Molloy b007bbb54f boards: arm: doc: fix small typo
Replace the accidently typed letter "d" with "r"

Signed-off-by: Philip Molloy <philip@philipmolloy.com>
2024-01-09 10:04:11 +01:00
Alberto Escolar Piedras 1be87446b1 docs boards native_sim: Mention the SocketCAN driver
Add a small paragraph about the native SocketCAN Linux driver.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-09 10:04:03 +01:00
Alberto Escolar Piedras 893b59b4aa docs boards native_sim: Mention the input SDL touch driver
Add a small paragraph about the input SDL touch driver,
clarifying the evdev driver is not the only input one.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-09 10:04:03 +01:00
Alberto Escolar Piedras b89399ff40 docs boards native_sim: Add mention about the EEPROM simu
Add a small paragraph about the EEPROM simulator,
and improve slightly the flash simulator section

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-09 10:04:03 +01:00
Alberto Escolar Piedras a2ad1b64a7 docs boards native_sim: Capitalize consistently peripherals table
Capitalize all acronyms and the begining of each entry consistently

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-09 10:04:03 +01:00
Andriy Gelman 4c080d4de5 boards: xmc47_relax_kit: Add ethernet/mdio to the devicetree
Add ethernet/mdio to the devicetree.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2024-01-09 10:00:47 +01:00
Andriy Gelman 2391ff7767 boards: xmc45_relax_kit: Add ethernet/mdio to the devicetree
Adds ethernet/mdio into to the devicetree.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2024-01-09 10:00:47 +01:00
Andriy Gelman 201167bdb1 dts: xmc4700_F144x2048: Merge dsram regions and use it as RAM
This is in preparation for xmc4xxx mdio/ethernet patch set. In the
ethernet drivers, the DMA memory (including descriptor and buffers)
must live in dsram1 or dsram2.

Currently, in xmc47_relax_kit the RAM is the psram1 region meaning
that DMA transfers will not work. Switch to using dsram regions instead.
Also, merge dsram1 and dsram2 into a single region since they are
contiguous.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2024-01-09 10:00:47 +01:00
Gerard Marull-Paretas 724a967c1a soc: riscv: renove_virt: reorganize SoC folder
Move out from riscv-privileged, and convert to a standalone SoC.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00
Gerard Marull-Paretas b5fb00bdc8 soc: riscv: opentitan: reorganize SoC folder
Remove from riscv-privileged, and create a standalone SoC.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00
Gerard Marull-Paretas 38a44e683e soc: riscv: sifive-freedom: reorganize SoC folder
Reorganized as follows:

- Created a new SiFive Freedom family
- Created 3 new series: E300/E500/E700
- Created Socs within each series (e.g. E340)

Also moved out of riscv-privileged folder.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00
Gerard Marull-Paretas b2b86556a7 soc: riscv: miv/mpfs: reorganize SoC folder
Merge both series into a new family: microchip_miv [1], moving them out
of riscv-privileged. Updated naming to stay closer to what vendor
announces on their website.

[1]: https://www.microchip.com/en-us/products/fpgas-and-plds/
     fpga-and-soc-design-tools/mi-v

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00
Gerard Marull-Paretas 4c4beabecc soc: riscv: efinix-sapphire: reorganize SoC folder
Move things out from riscv-privileged, and convert to single SoC.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00
Gerard Marull-Paretas 7da6342dff soc: riscv: virt: reorganize SoC folder
Move out of riscv-privileged, and convert to single SoC (no
family/series).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00
Gerard Marull-Paretas b7b19b8b05 soc: riscv: neorv32: reorganize SoC folder
Move out of riscv-privileged and convert to a standalone SoC. Note
that the family/series structure has been dropped in favor of a single
SoC (what NEORV32 seems to be).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00
Gerard Marull-Paretas 4a0d880350 soc: riscv: ite: reorganize SoC folder
Follow the vendor structure [1]:

- Family: ITE Embedded Controller SoCs
- Series: IT8XXX2
- SoCs: IT81202BX, IT81202CX, etc.

[1]: https://www.ite.com.tw/en/product/category?cid=1

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00
Gerard Marull-Paretas 8027689392 soc: riscv: andes_v5: reorganize SoC folder
Split out from riscv-privileged folder, and create a new family.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-09 09:40:07 +01:00