Kconfig.defconfig is the file meant for adjusting other Kconfig options
defaults. Also removed some redundant default conditions.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add initial support for the Salvator-X development board.
This work is strongly based on the H3ULCB board, but compared to it:
- device tree was enhanced
- adding all available push buttons and LEDs
- setting proper names according to the refdes used on the schematic and
PCB silkscreen
- documentation was adapted to this board
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Update board flash partition to be compatible with v1.13.0 f/w.
This configuration is compatible with stm32wb5x_BLE_Stack_full_fw
which should be installed at 0x080C7000.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The pm_constraint_* APIs were effectively used by the policy manager
only. This patch renames the API to the policy namespace and makes its
naming more explicit:
- pm_constraint_set -> pm_policy_state_lock_get()
- pm_constraint_release -> pm_policy_state_lock_put()
- pm_constraint_get -> pm_policy_state_lock_is_active()
The reason for these changes is that constraints can be of many types:
allow/disallow states, impose latency requirements, etc. The new naming
also makes explicit that the API calls will influence the PM policy
behavior.
All drivers and documentation have been updated accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix SRAM base address to 0x0 and set the size to 128M
Fix FLASH base address to 0x88000000 and set the size to 64MB
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
The Armv8R aarch64 is compiled with armv8.4-a, so the atomic_cas is
implemented by casal instruction, which needs FVP booting with
'-C bp.dram.enable_atomic_ops=1'
However, the FVP >= 11.17 has changed its parameters
'-C bp.dram.enable_atomic_ops' to '-C bp.s_dram.enable_atomic_ops' and
'-C bp.sram.enable_atomic_ops' to '-C bp.s_sram.enable_atomic_ops',
which is very annoying.
To fix this issue, disable LSE feature of GCC with 'armv8.4-a+nolse'.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
The Atmel SAM V71 Xplained Ultra development board is equipped with a
Microchip ATA6561 CAN transceiver with a maximum bitrate of 5Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Keyestudio CAN-BUS Shield (KS0411) is equipped with a Microchip
MCP2551 CAN transceiver with a maximum bitrate of 1Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The DFRobot CAN BUS Shield V2.0 is equipped with a NXP TJA1050 CAN
transceiver with a maximum bitrate of 1Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The NXP TWR-KE18F development board is equipped with a NXP MC33901 CAN
transceiver with a maximum bitrate of 1Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Atmel SAM E70(B) Xplained development board is equipped with a
Microchip ATA6561 CAN transceiver with a maximum bitrate of 5Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The NXP RDDRONE-FMUK66 development board is equipped with dual NXP
TJA1042 CAN transceivers with a maximum bitrate of 5Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Renesas R-Car H3ULCB development board is equipped with a TI
TCAN332G CAN transceiver with a maximum bitrate of 5Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Olimex OLIMEXINO-STM32 development board is equipped with a
Microchip MCP2551 CAN transceiver with a maximum bitrate of 1Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Olimex STM32-P405 development board is equipped with a TI SN65HVD230
CAN transceiver with a maximum bitrate of 1Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The NXP MIMXRT10xx/11xx EVK boards are equipped with NXP TJA1057 CAN
transceivers with a maximum bitrate of 5Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The NXP LPCXpresso55S16 development board is equipped with a NXP TJA1044
CAN transceiver with a maximum bitrate of 5Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Some non-essential peripherals peripherals including various sensors
were enabled by default in the defconfig file when they shouldn't be
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
This reduces power consumption by disabling the internal pull up
resistor on the SAO line of the lis2dh sensor
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Definitions of several nRF DK boards are missing flash and ram sizes.
This commit adds those missing entries.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Removing backend config from board Kconfig.defconfig and moving
it to native_posix backend configuration in logging. Without this
change define persisted even when logging was not using backends
and that impacted what is compiled in.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Move the file from board to soc to make it could be shared by
i.MX8M family. When MCUX_HAL supported in future, this file could
be dropped.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With RAM console, we could only see console log with debugger.
With jailhouse debug console, the log could be printed out to uart
with help from hypervisor. So let's switch to jailhouse debug console
Signed-off-by: Peng Fan <peng.fan@nxp.com>
According to the board porting guidelines, boards should enable
essential peripherals, such as GPIO/UART/CLOCK_CONTROL/PINCTRL, etc.
Things like PWM/ADC, etc. are not in the "essential" category.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The SPI cannot be shared between the cores. The MPSL running on
the network core does not support SPI comminucation yet, so the
application core sets FEM's CS to inactive state.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Add CONFIG_SMP to fvp_baser_aemv8r_smp board.
Fix compile warnings by adding missing header file in arm_mpu.c.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
This board reuse the work did to simulate an
ARMv8-R AArch64 profile core using the FVP platform,
but use the AArch32 profile.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
This adds the pwm feature to the nucleo_f091rc and nucleo_l073rz
and change the pin for nucleo_g474re from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Because we currently use RAM_CONSOLE for now, and there is actually
no device in the build, so there is twister build failure,
add a dummy file to avoid build failure.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
