Employ the nRF-specific timing calculations framework
(based on TIMER peripheral) only if the DWT is not present
on the SoC.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
nRF51 TIMER2 periperhal does not have the 32-bit
bitmode, so we need to fallback to the bitmode 16.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Cortex-M SoCs implement (optionally) the Data Watchpoint and
Tracing Unit (DWT), which can be used for timing functions.
Select the corresponding ARCH capability if the SoC implements
the DWT.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Use new timing API instead if local macros and functions. Add new
becnhmarks for threads and semaphore and change the output to be
parseable.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This code had one purpose only, feed timing information into a test and
was not used by anything else. The custom trace points unfortunatly were
not accurate and this test was delivering informatin that conflicted
with other tests we have due to placement of such trace points in the
architecture and kernel code.
For such measurements we are planning to use the tracing functionality
in a special mode that would be used for metrics without polluting the
architecture and kernel code with additional tracing and timing code.
Furthermore, much of the assembly code used had issues.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add initial support for X86 and get timestamps from tsc.
Authored-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add timing functions and APIs. This is now used with some of the tests
we have for performance and metrics and will be used whereever timing
informations are needed, for example for tracing, profiling and other
operations where timing info is critical.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
According to Intel 64 and IA-32 Architectures Software
Developer’s Manual, volume 3, chapter 8.2.5, LFENCE provides
a more efficient method of controlling memory ordering than
the CPUID instruction. So use LFENCE here, as all 64-bit
CPUs have LFENCE.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove this benchmark which was relying on custom tracing points in the
code and was not scalable. Use latency_measure benchmark instead which
is more realistic and measures similar metrics in a fully reproducible
manner and on all supported architectures.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
MCUX EHCI USB device controller supports a specific
number of bidirectional endpoints. Bidirectional means
that an endpoint object is represented to the outside
as an OUT and an IN Eindpoint with its own buffers
and control structures.
ep_abs_idx index refers to the corresponding control
structure, for example:
EP addr | ep_idx | ep_abs_idx
-------------------------------
0x00 | 0x00 | 0x00
0x80 | 0x00 | 0x01
0x01 | 0x01 | 0x02
0x81 | 0x01 | 0x03
.... | .... | ....
The NUM_OF_EP_MAX (and number of s_ep_ctrl) should be double
of num_bidir_endpoints. There is also no need to reserve
endpoint addresses for this controller type.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This commit fixes an issue where the list returned by
zephyr_get_include_directories_for_lang() would be a space separated
list, cause the arguments to be quoted during linking.
This is fixed by requesting `$<SEMICOLON>` to be used as separated which
which again ensures a correct expansion of the list.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This commit converts the MWDT bintools implementation from the old
macro based approach and into the new toolchain property scheme.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This commit converts the MWDT compiler implementation from the old
macro based approach and into the new toolchain property scheme.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Do not force linker to place text sections after each other
to have more freedom to optimize.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
MWDT CCAC compiler can't handle the dts file as gcc does, so
allow to specify compliler for DTS preprocessing which is differ
from ${CMAKE_C_COMPILER}.
Use ARC GNU compiler for DTS preprocessing in case of MWDT
toolchain.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
As of today we have a bit weird situation with generated
sw_isr_table / irq_vector_table tables.
On the final linkage stage we pass two files which content
section with sw_isr_table / irq_vector_table. They are
* libarch__common.a (with an outdated tables from the first
linkage stage)
* isr_tables.c.obj (with an actual tables)
The sections where tables are located are marked with
".gnu.linkonce" prefix. That means:
<<<As a GNU extension, if the name begins with .gnu.linkonce,
we only link a single copy of the section.>>>
However the "libarch__common.a" is passed to linker with
"--whole-archive" option which means <<<include every object
file in the archive in the link, rather than searching the archive
for the required object files>>>
That combination confuses MWDT linker and breaks linkage with
MWDT toolchain.
As a simple fix we can move the sw_isr_table / irq_vector_table
sections to their own library and link this library with
"--no-whole-archive" option.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Enable MWDT toolchain in sanitycheck for all ARC nSIM boards
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
* add metaware toolchain support in build system:
* compiler
* linker
* binutils
* gcc objcopy is used because it can't be replaced
with mwdt's binutils currently
* To use ARC metaware toolchain, you'd better:
* in Linux/Unix environment
* install arc gcc/zephyr toolchain to use gnu's objcopy
tool
* set ZEPHYR_TOOLCHAIN_VARIANT=arcmwdt
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Create include/toolchain/mwdt.h to handle difference in
several macros for MWDT and ARC GNU toolchains.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
MWDT toolchain adds additional suffix to sections name in case of
ffunction-sections / fdata-sections are enabled.
As proposed by Andy Ross let's pick a single set of rules
and syntax that work.
Suggested-by: Andy Ross <andy@plausible.org>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
ARC MWDT assembler has slightly different directives names:
.pushsect instead of .pushsection
.popsect instead of .popsection
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Add linker script template for MWDT toolchain (linker-mwdt.ld)
Move linker.ld to linker-gnu.ld (without changes)
The "linker.ld" is wraper now.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
"arch_switch" is declared as an inline function in kswap.h,
it should be a wrapper of arch level switch. The difference
of declaration and implementation of "arch_swich" causes
warning from MWDT compiler.
Use "arch_switch" with proper declararion (which is just
wraper for "z_arc_switch") to do conext switch for ARC.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Make the assembly codes compatible with both GNU
and Metaware toolchain.
* replace ".balign" with ".align"
".align" assembler directive is supposed by all
ARC toolchains and it is implemented in a same
way across ARC toolchains.
* replace "mov_s __certain_reg" with "mov __certain_reg"
Even though GCC encodes those mnemonics and even real
HW executes them according to PRM these are restricted
ones for mov_s and CCAC rightfully refuses to accept
such mnemonics. So for compatibility and clarity sake
we switch to 32-bit mov instruction which allows use
of all those instructions.
* Add "%%" prefix while accessing registers from inline
ASM as it is required by MWDT.
* Drop "@" prefix while accessing symbols (defined in C
code) from ASM code as it is required by MWDT.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
/#
Replace ASM sys_io implementation with identical C code for ARC.
This significantly improves portability, i.e. compiler decides
which instructions to use for a particular CPU and / or
configuration.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
GNU toolchain and MWDT (Metware) toolchain have different style
for accessing arguments in assembly macro. Implement the
preprocessor macro to handle the difference.
Make all ASM macros in swap_macros.h compatible for both ARC
toolchains.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Switch to the _arch_switch() API that is required for an SMP-aware
scheduler instead of using the old arch_swap mechanism.
SMP is not supported yet but this is a necessary step in that direction.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
To improve Zephyr security, I decided to create a test
test_after_syscall_cpu_scrubs_regs
I think necessary to check upon exit of a system call back
to the calling thread, the kernel scrubs CPU registers for sensitive
data.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
The sdhc_spi_write_multi function is sending the CMD25
for multiple block write operation on the SD card
instead of looping the CMD24. This is improving
the transfer speed compared to the sdhc_spi_write function
when the nb of blocks to write is significant (more than 2).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
I've repeatedly seen that people are not aware of the existence of
this configuration option.
I've been using build.pristine=auto daily for years and never had any
problems. I've also asked around on Slack a couple of times over
various points to see if anybody objects to making this change. Nobody
has, so let's just turn it on by default.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This introduces bt_gatt_attr_get_handle which can be used to resolve
handles of static attributes.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Make it actually give the original pointer to the attribute and its
resolved handle so static attributes don't need an extra lookup.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
