Fix application conn param update submitted before the timeout of
CONFIG_BT_CONN_PARAM_UPDATE has expired being ignored when
CONFIG_BT_GAP_AUTO_UPDATE_CONN_PARAMS=n.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Rename the update_work handler to deferred_work since this handler
is being multiplexed for different kinds of deferred work, not just
updating the connection parameters.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Move auto-initiation of the peripheral connection parameter update,
this handling would only submit the delayed work with the timeout once
all other auto initiated procedures had completed. This behavior means
that the delay would not be set on when the connection was established
but instead relative to the previous procedures.
Based on the connection interval used, the instant(s) used, and the
number of auto procedures this delay becomes indeterminate.
Submit the work once connected, the constraint that existed in the
zephyr link layer earlier about requesting only one control procedure
at a time has been removed.
This also brings all the handling of the timeout work to the connection
state handling, which makes it easier to track this behavior in code.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Document the behavior of the bt_conn_le_conn_update API when the
local device is the peripheral role.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
This is to make the gpio-i2c initialization occur after the GPIO pin
clock initialization.
Signed-off-by: Cassini Zhuang <cassini.zhuang@hansonggroup.com>
This suite now uses far less memory and is much simpler.
We still maintain coverage of all the memory domain APIs
and ensure that the maximum number of partitions can be
applied.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The tests test_mem_part_auto_determ_size and
test_mem_part_auto_determ_size_per_mpu are supposed to
just be checking the construction of automatic memory
partitions.
test_mem_part_auto_determ_size had a bunch of extraneous
stuff covered by other test cases and reserved three
different thread stacks.
These two tests have been drastically simplified and
combined.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
test_mem_part_inherity_by_child_thr duplicates logic already
present in test_permission_inheritance. That test puts a
buffer called 'inherit_buf' in 'inherit_memory_partition'
and shows that it is accessible by a child thread by
writing to it.
Delete this unnecessary test.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Tests are now grouped in the C file they occur in.
test_mark_thread_exit_uninitialized no longer occurs twice.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
put all globals only used in this C file in static scope, which
revealed that a few of them were not used at all.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
If KPTI is not enabled, then the US bit will be set for all
the default memory partitions in the _app_smem section.
The error printed when a mismatch occurs now shows the
expected flags.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add description how to enable zero-latency interrupt in the application
code. Previous docs described only the Kconfig and not the flag.
Signed-off-by: Martin Jäger <martin@libre.solar>
For threads that run in supervisor mode for some time before
synchronously dropping to user mode, re-initialize the TLS
area to prevent leakage of potentially sensitive information.
We did this already for CONFIG_THREAD_USERSPACE_LOCAL_DATA
but not the new CONFIG_THREAD_LOCAL_STORAGE.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We now just use two memory domains; the default domain and an
'alternate_domain' used for tests that need to handle a memory
domain switch.
Along the way the test code was simplified.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
z_tick_get returns signed int. Adapt comparision
statement for remaining time computation.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Saves quite a bit of memory on MMU-based systems which manage
page tables at the memory domain level.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Memory domains can be very expensive to instantiate. Demonstrate
how the default memory domain can be re-purposed for an
application, much like how the main thread already is.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Prior to this commit, the LwM2M stack would TLV-encode integers
depending on their internal storage size. An integer with value 5 stored
in an int8_t would be encoded with length 1, but an integer stored in an
int32_t would be encoded as "00 00 00 05" with length 4.
This commit checks if the value is castable to a smaller int and encodes
it as such if so. This is cascading, so even a 64 bit integer with value
5 will be encoded with length 1.
Note that this does not seem to be required by the specification, but
this is how Anjay and the other LwM2M stack seem to do it.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
This enables storing errno in the thread local storage area.
With this enabled, a syscall to access errno can be avoided
when userspace is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The errno_var copy in Xtensa's struct is not being used at all
for errno (as there is already one in struct k_thread).
So remove it.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.
Note that this does not enable TLS for all Xtensa SoC.
This is because Xtensa SoCs are highly configurable
so that each SoC can be considered a whole architecture.
So TLS needs to be enabled on the SoC level, instead of
at the arch level.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.
Note that since Cortex-M does not have the thread ID or
process ID register needed to store TLS pointer at runtime
for toolchain to access thread data, a global variable is
used instead.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the common struct fields and functions to support
the implementation of thread local storage in individual
architecture. This uses the thread stack to store TLS data.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the tdata and tbss sections required for thread local
storage. They are in ROM area as these sections are not to be
directly accessed, but copied to thread local storage area at
thread creation.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The z_libc_partition was only enabled when newlib is being used,
and/or stack canaries are needed. This adds a hidden option
where this partition can be enabled if needed, regardless of
whether newlib is used or stack canaries are needed.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add kconfigs to indicate whether an architecture has support
for thread local storage (TLS), and to enable TLS in kernel.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Arches which have custom swap to main can have _current be
NULL very, very early in the boot process. Check this to
avoid an infinite loop of fatal errors.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add Queue Size and Receive Window information to lpn
callback function to notify upper layer to determine
currently friend node information, which may be used
in future.
Add Callback structure to notification application which friendship
has been changed.
Add function `bt_mesh_friend_terminate` let's app layer determine
terminate friendship manually.
Signed-off-by: Lingao Meng <mengabc1086@gmail.com>
It's not clear why this error is here. The "formats" array seems to
be limited to "bin" and "hex" only, but every signing tool is going to
have its own idea of what format to emit and what ingredients need to
be used to do that.
In particular, rimage (used for the Intel Audio DSPs) doesn't use nor
generate zephyr.bin (it's very large), so it trips over this failure.
Just present the possibly-empty list of output formats to the Signer
object and let it make the decision about whether an empty formats
list is an error.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The core kernel does not use this yet, but it will be later used
as part of infrastructure for memory-mapping stacks, as detailed
in #28899.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This seems like a typo since all other places accessing bus_segs in
this context use i as the index.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
In the MMU code mapping_pos is miscalculated when for example
SRAM_BASE_ADDRESS==0x40000000 and KERNEL_VM_SIZE==0xc0000000 getting a
mapping_pos of 0x0.
The problem is that we must cast the two values to uintptr_t before
casting the result to avoid the rollover to 0.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
