Commit graph

376 commits

Author SHA1 Message Date
Lucas Tamborrino b916440b2e drivers: dma: esp32xx: Remove dynamic allocation for invalid buffers
According to the coding guidelines "dynamic allocation is not allowed".

This commit removes handling invalid DMA capable buffers by allocating
temporary buffer in a valid memory region, considering them as errors.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-05-10 10:15:05 +02:00
Lucas Tamborrino a35dd4b926 drivers: dma: esp32s3: Add DMA support for esp32s3
Add GDMA support for esp32s3.
Remove suspend/resume since they are optional and do
the same as start/stop.
Fix possible null pointer derreference.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-05-10 10:15:05 +02:00
Cyril Fougeray 1be72d9888 dma: callback with 2 status codes for successful transfers
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-05-08 09:57:32 +02:00
Tomasz Leman 9028ad5d71 drivers: gpdma: pm runtime works only on ace
CAVS platforms are not fully integrated with zephyr. Some of the
registers are still programed from SOF side. This feature can be enabled
for those platforms later when integration is fully done.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-25 16:19:45 +02:00
Tomasz Leman 8575a6037b drivers: gpdma: enable clock gating
This patch is adding function enabling DMA clock gating.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-25 16:19:45 +02:00
Tomasz Leman 77805f3be4 drivers: gpdma: release dma ownership
Adding function that is allowing to release ownership of the DMA. When
DSP is no longer using dma instance it ownership can be released.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-25 16:19:45 +02:00
Tomasz Leman 9ef378f8d2 drivers: gpdma: power off
This patch allows device power manager to disable GPDMA instance when
its no longer in use.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-25 16:19:45 +02:00
Tomasz Leman 705d1c2c04 drivers: gpdma: power flow refactor
This patch is refactoring device power flow routine. DMA instance will
not be power up after kernel initialization if device power management
is enabled. Power menager will power up device and its power domain if
device will be in use and disable it when it's no longer needed.

The DMA disabling part has not yet been implemented.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-25 16:19:45 +02:00
Mahesh Mahadevan 629f8d83b5 drivers: dma: mcux_lpc: Update address increment logic
The address increment logic was looking at both source
and destination parameters together. Separate them so
we can set one.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-04-20 09:07:37 -05:00
Sylvain Chouleur 705e1e7916 dma_dw: separate intel specific registers from synopsys ones
CFG register uses fields that are not defined in Synopsys databook of
Designware AHB DMA Controller.

Since current Zephyr code uses this driver only for the
intel_adsp_gpdma driver I assume that those fields are specific to
this DMA which is not the standard Designware one.

This patch allows to use either the standard Designware register or
the Intel one.

Signed-off-by: Sylvain Chouleur <schouleur@graimatterlabs.ai>
2023-04-07 13:22:25 +02:00
Anas Nashif 402ac9e409 drivers: remove references to old CAVS platforms
Remove reference to all dropped CAVS platforms in drivers.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-06 18:51:56 +02:00
Pieter De Gendt 6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Francois Ramu 93a1b61684 drivers: dma: stm32u5 dma driver with two dma instances
Add a second instance of DMA to the stm32 dma driver from the DTS
That can be found in the stm32H5 serie, where 2 GPDMA with 8 channels
are available. Rebuilding with Macro.
Use the dma_channels property of the dedive tree to count the nb
of dma channels: 16 or 8 (like in stm32h5).

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-31 14:02:15 +02:00
Henrik Brix Andersen c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
TOKITA Hiroshi 08606eac44 drivers: dma: rpi_pico: add support for RaspberryPi Pico DMA
Adding RaspberryPi Pico DMA driver.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-03-22 09:33:52 +01:00
Gerson Fernando Budke bf46696057 drivers: dma: sam: Update to use clock control
This update Atmel SAM xdmac driver to use clock control driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Tomasz Leman fbe930ad0e driver: gpdma: balance the pm usage
Because the DMA driver allows multiple start and stop calls for the same
instance and the same channel, we cannot rely on the error codes
returned by these functions to notify the device's power manager that a
device is still in use.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-03-21 18:10:41 +00:00
Kai Vehmanen e40859f787 Revert "dma: dw: Do not program SAR/DAR and CTL_HI/LO when using HW LLI"
Failures are seen with SOF digital mic capture test cases on Intel cAVS2.5
platforms if the SAR/DAR/CTL writes are skipped.

This reverts commit 08d9efb202.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-03-21 13:50:08 -04:00
Ranjani Sridharan b32b321f50 dma: dw: Poll to check for channel disable with timeout
After disabling the channel, it is recommended to poll with timeout to
ensure that the channel has actually been disabled. Without this,
reconfiguring the DMA again while the channel is active could lead to
unexpected behavior and/or DMA underruns.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-03-17 09:29:25 +01:00
Ranjani Sridharan 6226f9e6e4 dma: dw: fix the return value check
The WAIT_FOR() function returns the value of checked expression. So fix
the return value check to log and return the timeout error when checking
if the FIFO is empty during stop.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-03-17 09:29:25 +01:00
Ranjani Sridharan 08d9efb202 dma: dw: Do not program SAR/DAR and CTL_HI/LO when using HW LLI
When using the HW LLI, there is no need to program these resgisters.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-03-17 09:29:25 +01:00
Ranjani Sridharan 045c686734 dma: dw: Add a debug utility function
Add a helper function to dump the GPDMA SHIM and channel registers for
debug along with a config option to enable it.

Co-developed-by: Tom Burdick <thomas.burdick@intel.com>
Singed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-03-17 09:29:18 +01:00
Francois Ramu c37272b321 drivers: dma: stm32 disabling stream waits for disable
Add the loop to wait until the stream is really disable after disabling
and also cleared the TCIF flag.
This is a specifity of the dma of type V1.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-15 15:01:15 +01:00
Hein Wessels 7d76842fdf drivers: dma: stm32: dmamux: support dmamux2 and bdma
Extends dmamux driver to support DMAMUX 2,
which supports the BDMA on STM32H7 devices.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Hein Wessels c4f88a9d6e drivers: dma: stm32: dmamux: abstact calls to dma drivers
Wrap calls to DMA drivers through fops to allow
different dmamuxes to point to different types of
dma with different function calls.

In preperation to add support for BDMA and DMAMUX2.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Hein Wessels e01270793e drivers: dma: stm32: bdma support for H7
Implement STM32H7 BDMA driver.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Andriy Gelman 8a97da056b drivers: dma: Add infineon xmc4xxx dma support
Adds dma drivers for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-21 21:15:53 +01:00
Jay Vasanth c504e1e5cd drivers: dma: Add Microchip XEC DMA driver
The Microchip XEC family of microcontrollers includes a
simple DMA block implementing multiple channels. DMA supports
memory to memory, memory to peripheral, and peripheral to
memory transfers. Peripheral support is limited by each
chip to I2C and SPI controllers. DMA hardware does not support
scatter-gather or linked transactions.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-02-19 20:38:21 -05:00
Kai Vehmanen 0c0d73721e dma: dw: allow to stop in DW_DMA_SUSPENDED state
Allow DMA channel to be stopped even if it is in suspended state.
The current code in dw_dma_stop() supports this, but the recently
added early check for dw_dma_is_enabled() results in DMA stop
sequence to be skipped if the channel was in suspended state.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-02-19 20:37:26 -05:00
Kai Vehmanen 6422b2b094 dma: dw: fix include for chan_data
The conditional definitions are not correct as "chan_data"
is used without any include guards, but defined only if
CONFIG_DMA_DW_HW_LLI or CONFIG_DMA_DW_SUSPEND_DRAIN is defined.
Correct the declaration to match usage.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-02-19 20:37:26 -05:00
Francois Ramu 4de473e4c9 drivers: dma for stm32u5 returns from a repeated start or stop command
On a repeated dma_start, the stm3u5 dma driver should return
immediately if it is already started.
On a repeated dma_stop, the stm3u5 dma driver should return
immediately if it is already stopped.
This like the dma driver does for other stm32 series.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-02-11 07:57:44 +09:00
Daniel DeGrasse 844685224b drivers: dma: remove unused mutex from edma driver
Mutex initialized by edma driver is not used. Remove it from the
driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-02-06 10:05:44 +01:00
Tom Burdick 58312e6104 dma: Repeated start/stop support for gpdma
Allows for repeatedly calling start/stop on designwares gpdma.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-01-23 11:51:21 -08:00
Tom Burdick b14296af38 dma: HDA ignore repeated start/stop requests
The DMA API contract specifies that start/stop may be called multiple
times. Prior to adding power management this was perfectly fine as it was.
In adding power management, there are additional side effects that can
cause issues. Instead check the state of the channel prior to start/stop
and do nothing if already in the desired state.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-01-23 11:51:21 -08:00
Adrian Warecki 5d902ea621 dma: dw: Align error code for xrun reporting
The hda driver uses -EPIPE to signal xrun, as proposed in the alsa lib
https://www.alsa-project.org/alsa-doc/alsa-lib/pcm.html. This commit
changes the xrun error code in dw dma driver from -ENODATA to -EPIPE to
make it consistent across drivers.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-01-19 15:45:16 +00:00
Francois Ramu 227226313a drivers: dma: stm32 dma driver support repeated start/stop
To support the repeated start/stop, the stm32 dma driver is
returning 0 if the channel is already started/stopped.
This is not done at the dmamux level if any.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-19 12:03:50 +01:00
Piotr Makaruk 00b5114344 dma: hda: enable xrun handling
Enable link under/overruns handling and reporting such events in dma
status

Signed-off-by: Piotr Makaruk <piotr.makaruk@intel.com>
2023-01-17 18:50:15 -05:00
Lucas Tamborrino 17fbdc55b5 drivers: dma: esp32c3: add gdma driver
Add GDMA driver for esp32c3.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-01-12 19:09:01 +01:00
TOKITA Hiroshi 1690326268 dts: bindings: dma: gd32: split gd,gd32-dma-v1 for support F4xx feature
Split gd,gd32-dma-v1 from gd,gd32-dma to support F4xx specific features.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-12-22 13:43:49 +01:00
TOKITA Hiroshi 498ef65242 dts: bindings: gd32-dma-base: add gd,mem2mem property
Add `gd,mem2mem` property to indicate the DMA controller supports
memory to memory transfer.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-12-22 13:43:49 +01:00
TOKITA Hiroshi ad055bd5fc drivers: dma: dma_gd32: Use dma_slot for peripheral request
Use dma_slot for peripheral request instead of linked_channel.
This is a more suitable usage as described in dma_config.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-12-22 13:43:49 +01:00
Tomasz Leman af6d827b64 drivers: hda: enable runtime power mgmt in intel hda dma
Enable Zephyr device runtime power management mechanisms in Intel HDA
DMA driver. This allows Zephyr to track usage reference for power domain
gating.

PM action handler is currently empty and will be fill out later.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-12-16 11:03:15 +00:00
Tomasz Leman de1bd1fa04 drivers: gpdma: enable runtime power mgmt in intel gpdma
Enable Zephyr device runtime power management mechanisms in Intel GP DMA
driver. This allows Zephyr to track usage reference for power domain
gating.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-12-15 19:17:21 +01:00
Tom Burdick 603cc27045 dma: Add max block count attribute
Adds an attribute that describes the maximum number of scatter gather
blocks that the DMA will accept. Useful in cases where DMA is used as
the abstraction for moving data around (e.g. SoF audio streams) and
variances of the hardware need to inform decisions about how to use
the DMA API.

Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-12-14 09:51:10 +01:00
Patryk Duda e4b8dce1e5 drivers: dma: Simplify stm32_dma_check_fifo_mburst() function
This function is responsible for checking if combination of msize,
mburst and FIFO level is allowed. Possible combinations can be found in
ST documentation, eg. Table 36. FIFO threshold configurations, RM0402
9.3.13 FIFO chapter.

Previously there was no 'break' or '__fallthrough' in msize switch which
caused compilation errors. Since we are confirming that combination is
correct, 'break' statements should be used.

Besides of introducing missing 'break' statements, this patch moves
'return false' from switch to the end of the function. This makes code
shorter and easier to understand, because we have only correct
combinations.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-09 11:18:01 +01:00
Francois Ramu 9c49ee3e48 drivers: dma: stm32u5 dma with resume API function
Add the resume API function for the dma driver of the stm32U5 serie.
That completes the suspend API function.
Controlling the SUSPF bit of the GPDMA CR register is enough
to suspend/resume the channel.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-12-08 14:59:01 +00:00
Francois Ramu e5306ed8e3 drivers: dma: stm32u5 do not reset the dma channel when suspending
There is no need to reset the channel else DMA config is lost and
channel should be enabled again in case of resume.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-12-08 14:59:01 +00:00
Jaska Uimonen 43fe2bba37 drivers: dma: gpdma: reduce logging verbosity
Reduce logging verbosity in status call from INF to DBG as the function
can be called any given time i.e. eveything is fine even if the read and
write pointers don't differ.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-11-24 15:22:30 +01:00
Adrian Warecki 7aaaffe623 dma: dwdma: Remove unused defines
There was no reference to the DW_DMA_BUFFER_PERIOD_COUNT,
so it was removed.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00
Adrian Warecki cb8b1b511c dma: adsp: gpdma: Add support for get_attribute
Added the new intel_adsp_gpdma_get_attribute function that returns
dma controller attributes.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2022-11-23 15:36:31 -05:00