This commits changes how data on the disk is accessed. There are disk
structures which are packed and their fields are stored in little endian
byte order. To use data in the program structures it has to be translated
from little endian to cpu endianness.
Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
- `ext2_file` and `ext2_dir` merged into one struct and allocated from
dedicated slab
- `ext2_inode` allocated from dedicated slab
- `ext2_disk_dentry` allocated from heap (because their size is not
constant)
- `ext2_bgroup` and `ext2_disk_superblock` statically allocated
Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
Fix the behavior when data should be written to storage device. Now all
writes are done directly to disk_access layer (where it might possibly
be cached).
Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
Added funtion that takes specified action when file system corruption is
detected. Possible actions are: do nothing, make mount point read-only,
panic.
Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
Changes:
- Added few assertions to check if some assumptions are correct
- Fix removing blocks during trucate and inode removal
- Clear entry in inode table after inode has been removed
Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
Changes:
- Add fs::sync function
- Make correct file system in mkfs
- Add few assertions to ensure that all assumptions are correct
Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
Implement tests for ext2 implementation. Tests can run on native_posix
platforms and on hifive_unmatched.
Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
SPI driver is current working for common SPI devices.
However, addressable LED like WS2812 requires MOSI line to be
default LOW during initialization. This PR adds such option.
This has no effect on common SPI operation.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Flaky tests give innacurate test summary indicating a misleading
passing test suite. Add new status for flaky tests.
Signed-off-by: Al Semjonovs <asemjonovs@google.com>
Add no-timers configuration to sample.minimal to check that
it's actually working in runtime.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
This version introduces support for the syscalls extension,
which greatly reduces the amount of bandwidth being used
for tracing syscalls.
Signed-off-by: Aron Lander <aron.lander@percepio.se>
When a PAwR sync connects to a PAwR advertiser and CONFIG_BT_PRIVACY
is enabled a Resolvable Private Address will be used. Use that
as responder address instead of the identity address to match what
the central sees.
Signed-off-by: Herman Berget <herman.berget@nordicsemi.no>
This test was turned off last weekend when a sensor misbehaved and broke
the CI, but that issue was resolved in #61016. This PR turns the test
back on.
For more info on what this test does, please see #60394.
For more context see also the comments under #60959
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Some configurations have the system timer driver hardwired in.
Let's make them compatible with CONFIG_SYS_CLOCK_EXISTS=n.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
When timers are configured out, timepoint-based timeouts are reduced to
"no wait" or "wait forever" only.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Modify the NPCX driver erase method to allow 0x1000 byte size erases
along with 0x10000 byte size erases based on input parameters
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
This board has a single instance of EMAC connected to a NXP TJA1103
Ethernet PHY. Currently, there is no driver for this PHY and its
pin strapping configuration allows to use it without software
configuration, so EMAC is configured as fixed link.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This device has a single instance of EMAC (a 100Mbps version of GMAC).
TCP/UDP checksum calculation is offloaded.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add initial support for NXP S32 GMAC/EMAC:
- it's a copy-implementation with DMA data buffers and buffer
descriptors in non-cached memory (buf len and ring size configurable)
- PHY interface selection only implemented for S32K3 devices as it is
SoC-specific
- no PHY driver integration, it works as a fixed link with speed/duplex
configured through devicetree
- supports multicast hash filtering, promiscuous mode, MAC loopback
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
