Commit graph

47616 commits

Author SHA1 Message Date
Erwan Gouriou dc110506d9 drivers/flash: flash_stm32_qspi: Set DMA as optional
In order to ease reuse on other series, set DMA as optional
and use IT if no DMA channel is specified in the qspi node.

Tested on disco_l475_iot1

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-15 10:29:30 -05:00
Erwan Gouriou b711028539 scripts/Kconfig: Add dt_node_has_prop Kconfig function
Add dt_node_has_prop function to query the presence of 'prop'
for given node label.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-15 10:29:30 -05:00
Erwan Gouriou ee199eed10 samples/subsys: littlefs: Add disco_l475_iot1
Add disco_l475_iot1 as build platform for this sample

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-15 10:29:30 -05:00
Erwan Gouriou e2ff107cf2 samples: spi_flash: Add compatibility with st,stm32-qspi-nor
Enable using st,stm32-qspi-nor compatible driver for this
sample.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-15 10:29:30 -05:00
Erwan Gouriou b711740c8f boards: disco_l475_iot1: Enable support for MX25R6435F QSPI NOR
Configure QSPI NOR support and MX25R6435F on disco_l475_iot1 board.
Set MX25R6435F as flash controller and arrange partitions to take
newlay available space into account.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-15 10:29:30 -05:00
Erwan Gouriou 4de9f27651 dts: Add stm32 quadspi support on L4 series
Add device tree description for qspi node on STM32L4 and
signals on whole family.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-01-15 10:29:30 -05:00
Erwan Gouriou 9bfb889088 drivers/flash: stm32: Add qspi-nor flash-controller
Add support for DMA based STM32 QSPI NOR flash controller.
Driver configures both NOR flash and also QSPI hardware block.
Reuses existing jesd216 library.

QSPI hardware block handling is done through the use of Cube HAL API.
This requires the use of HAL interface also for DMA besides zephyr
DMA driver.
Zephyr DMA driver is used only for IRQ routing while HAL driver
handles the IP block. To achieve this it is required to:
-Configure both Cube and Zephyr drivers at init.
-Inform Zephyr driver that current channel handling will be done
by another instance and only a limited configuration should be done.
For this last part, a unused parameter is overridden in order to
transmit the information.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-01-15 10:29:30 -05:00
Erwan Gouriou d43200e9c4 drivers/dma: stm32: Preparation for QSPI DMA mode support
In preparation for QSPI DMA mode:
-Add a possibility to override driver by the HAL DMA. In that case
stream is set as busy and no configuration nor treatment is done.
In case of interrupt, flags clearing is let to HAL.
-Treat Half Transfer interrupt prior to Transfer Complete for the
cases were both IRQ are both raised at the time IRQ handler is called

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-15 10:29:30 -05:00
Erwan Gouriou 93ced15ef8 dts/bindings: flash_controller: Add stm32 qspi-nor flash controller
Add a binding to describe stm32 qspi-nor flash controller

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-15 10:29:30 -05:00
Erwan Gouriou afc3f3ae31 dts/bindings: qspi: Add stm32 qspi binding
qspi bus controller bindings for stm32 family.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-15 10:29:30 -05:00
Piotr Mienkowski 7b38a5feb9 drivers/clock_control: stm32: Add AHB3 bus support
AHB3 bus support is added for compatible series.
Additionaly, fix condition for AHB2 support and fix
formatting

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-01-15 10:29:30 -05:00
Erwin Rol f770dc7121 tests: drivers: spi: spi_loopback: Enable nucleo_g474re DMA support
Enable DMA support for the Nucleo g474re board

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2021-01-15 10:27:43 -05:00
Erwin Rol 5a8d458c8d tests: drivers: spi: spi_loopback: Enable nucleo_l4r5zi DMA support
Enable DMA support for the Nucleo l4r5zi board

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2021-01-15 10:27:43 -05:00
Erwin Rol 80cc1b71e1 dts: arm: stm32g4: Add dma1, dma2, and dmamux1
Add DTS configuration for dma1, dma2, and dmamux1.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2021-01-15 10:27:43 -05:00
Erwin Rol cceff836ae soc: arm: stm32: Remove mem pool selection
Since the use of kmalloc was removed from the DMAMUX driver
there is no need for a memory pool anymore.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2021-01-15 10:27:43 -05:00
Erwin Rol 4cc15d73dd drivers: dmamux: Remove need for kmalloc
Use file static variable for the channel config data, instead
of a dynamic array allocated with kmalloc.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2021-01-15 10:27:43 -05:00
Peter Bigot 8c4c72d213 drivers: adc: update to conform to API guidelines
When the async API is not enabled produce a link-time error rather
than a runtime error.  Also document the dependence on the option.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-15 09:50:40 -05:00
Peter Bigot 2ef30e529b drivers: spi: update to conform to API guidelines
When the async API is not enabled produce a build-time error rather
than a runtime error.  Also document the dependence on the option.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-15 09:50:40 -05:00
Peter Bigot 2b7a27e314 doc: clarify api design guidelines for optional API
There has been discussion about whether invocations of optional API
that has been disabled should:

1. result in a link-time error because the API implementation is not
provided; or

2. result in a run-time error by having a trivial implementation that
returns -ENOTSUP.

Clarify that the intent of the guideline is that a link-time error
should be produced.  The rationale is that it is too easy to disable
the option at build time, and not discover it because the application
fails to check for a `-ENOTSUP` return.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-15 09:50:40 -05:00
Anas Nashif 7223154511 checkpatch: ignore device tree related warnings
This has never been enforced and we have our own DT related checks.
Removing for now as it seems to be Linux specific.

- UNDOCUMENTED_DT_STRING
- DT_SPLIT_BINDING_PATCH
- DT_SCHEMA_BINDING_PATCH

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-15 09:46:16 -05:00
Fabio Baltieri 9c67b4dad2 dts: npcx7m6fb: make clock-frequency required, drop redundant fields
Setting clock-frequency as required (the driver does not build without
it) and dropping definitions that are already specified in
i2c-controller.yaml.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2021-01-15 08:32:53 -06:00
Fabio Baltieri be7b5eb060 dts: cleanup few cases of space before colon
Replace few instances of space before colon in the binding files, not
functional, just for coherency.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2021-01-15 08:32:53 -06:00
Maureen Helm 4afc4781cd boards: soc: arm: Set zephyr,itcm chosen node for i.MX RT boards
Sets the device tree chosen node for instruction tightly coupled memory
(ITCM) on all i.MX RT boards. Leverages the common Cortex-M linker
section instead of the SoC-specific one.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-15 14:51:20 +01:00
Maureen Helm f63385204c linker: arm: Add cortex_m itcm section
Adds a linker section for Cortex-M instruction tightly coupled memory
(ITCM), similar to the existing section for DTCM. A new executable MPU
region is not added as there isn't currently a need to make this section
accessible to user mode. This section can be enabled by setting a device
tree chosen node zephyr,itcm.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-15 14:51:20 +01:00
Maureen Helm 334014a8fe linker: arm: Fix cortex_m dtcm and ccm sections to work with relocation
Adds missing DTCM_ADDR and CCM_ADDR macros needed by the linker script
generated by scripts/gen_relocate_app.py.

Moves associated bss_end, noinit_end, and data_end linker symbols to
account for section relocation. Without this change, the section sizes
calculated in z_bss_zero() and z_data_copy() are incorrect.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-15 14:51:20 +01:00
Katsuhiro Suzuki bbc563f5ac boards/dts: riscv: add SiFive FE310 watchdog driver bindings
This patch adds watchdog driver bindings and enable it for SiFive
HiFive1 rev.B board.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-01-15 07:19:38 -06:00
Kumar Gala 02703e60d9 device: Remove DEVICE_DT_DECLARE / DEVICE_DT_INST_DECLARE
Now that we generate a header that extern's all possible devicetree
based device struct we can remove DEVICE_DT_DECLARE and
DEVICE_DT_INST_DECLARE as they aren't needed anymore.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-15 07:16:21 -06:00
Kumar Gala 98b6e4f834 devicetree: generate extern's for devicetree struct devices
Generate a header (device_extern.h) that handles extern of possible
device structs that would come from devicetree.  This removes the need
for DEVICE_DT_DECLARE and DEVICE_DT_INST_DECLARE which we can remove.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-15 07:16:21 -06:00
Emil Lindqvist 09e9736b4b drivers: modem: ublox-sara-r4: remove redundant wait after sendto
According to AT commands manual, no wait after prompt '@'
is required if using AT+USOST commmand (aka. sendto,
only used with UDP).

Signed-off-by: Emil Lindqvist <emil@lindq.gr>
2021-01-15 12:41:25 +02:00
Lukasz Majewski 33028963c8 test: af_packet: Add test for passing UDP packet to open RAW socket
The af_packet test has been augmented to check if sent UDP packet from
one port to another (via net interface) is also passed to open SOCK_RAW
connection.
The test_packet_sockets() function has been reused to setup the SOCK_RAW
sockets for this test.
It is important to note that the packet is passed to receive part of net
stack after being sent.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-01-15 09:30:17 +02:00
Lukasz Majewski 83f523f0a5 net: Add support for simultaneous UDP/TCP and raw sockets
This patch brings support for AF_PACKET and SOCK_RAW type of sockets.
In net_conn_input() function the new flag has been introduced -
'raw_pkt_continue' to indicate if there are other than AF_PACKET
connections registered.

If we do not have other connections than AF_PACKET, the packet is
solely handled in net_conn_input() (or to be more specific in its
helper function - conn_raw_socket()).

Otherwise, it is passed back to net_conn_input in IPv4/6 processing.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-01-15 09:30:17 +02:00
Lukasz Majewski 1f72b1f6bd net: Exclude code responsible for handling raw sockets processing
The new function - namely conn_raw_socket(); has been introduced to
handle raw sockets processing. Its code, up till now, only was
executed when IS_ENABLED(CONFIG_NET_SOCKETS_PACKET) was defined.

After this change it can be reused when one would like to handle
raw sockets also when CONFIG_NET_{UDP|TCP} are enabled.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-01-15 09:30:17 +02:00
Lukasz Majewski 4987c7ba47 test: af_packet: Do not change proto to network order when creating socket
The setup_socket() function calls socket() with proto changed to network
order. In this case functions with zsock_* prefix are called instead of
zpacket_*. The problem is with 'packet_is_supported()' method from
sockets_packet.c, which returns false when ETH_P_ALL proto is converted
with htons().

This patch fixes this issue by removing the htons() call.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Suggested-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2021-01-15 09:30:17 +02:00
Guillaume Paquet 6e7a2ecf1e drivers: modem: Fix UDP management in BG96 modem
Fix UDP test in connect and send to be able to send in TCP

Signed-off-by: Guillaume Paquet <guillaume.paquet@smile.fr>
2021-01-15 08:45:51 +02:00
Katsuhiro Suzuki a688b4da73 drivers: watchdog: implement SiFive FE310 watchdog driver
This patch adds watchdog driver for HiFive1 rev.B that has SiFive
Freedom E310 SoC.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-01-14 21:31:05 -06:00
Andy Ross e956639dd6 kernel: Remove CONFIG_LEGACY_TIMEOUT_API
This was a fallback for an API change several versions ago.  It's time
for it to go.

Fixes: #30893

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-01-14 21:33:16 -05:00
Anas Nashif 384ad9c3d4 checkpatch: increate line length to 100
Change max line length to 100, this is to follow Linux and to allow for
more readable code. Most warning we get now from checkpatch are because
of this limit which has prevented us from enforcing warning.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-14 17:29:37 -05:00
Anas Nashif 5d50797dad ci: handle checpatch warnings as errors
Fail CI if we have both errors and warnings.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-14 17:29:37 -05:00
Marc Herbert d7ac0e08fc doc: west: add note about west update --keep-descendants option
The previous and short description wasn't enough for me to understand
the interesting trade-off of --keep-descendants, thanks to
@mbolivar-nordic for clarifying this on Slack.

For reference this option was added in west commit 11b8588303 part of
https://github.com/zephyrproject-rtos/west/pull/165/

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2021-01-14 16:24:53 -06:00
Noelle Clement 220316c937 soc: arm: stm32: Add support for STM32L152xC SoCs
STM32L152xC SoC differs from other L1 SoCs in RAM (32KiB) and
flash (256KiB) size, EEPROM size (8Kib) and amount of interrupts
(57, see STM32Cube). Devicetree and Kconfig support.

Signed-off-by: Noelle Clement <noelleclement@hotmail.com>
2021-01-14 16:22:17 -06:00
Hake Huang f02454f68a tests: update edma test pattern
align test pattern with testcase.yml

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-14 16:14:51 -06:00
Hake Huang f8f8aa1ef7 dts: nxp edma update edma label to aligne with config setting
after 7c699348a8
Convert drivers to new DT device macros

now the device name is aligned with label so we need
align them to default config

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-14 16:14:51 -06:00
Carlo Caione c5b898743a aarch64: Fix alignment fault on z_bss_zero()
Using newlibc with AArch64 is causing an alignement fault in
z_bss_zero() when the code is run on real hardware (on QEMU the problem
is not reproducible).

The main cause is that the memset() function exported by newlibc is
using 'DC ZVA' to zero out memory.

While this is often a nice optimization, this is causing the issue on
AArch64 because memset() is being used before the MMU is enabled, and
when the MMU is disabled all data accesses will be treated as
Device_nGnRnE.

This is a problem because quoting from the ARM reference manual: "If the
memory region being zeroed is any type of Device memory, then DC ZVA
generates an Alignment fault which is prioritized in the same way as
other alignment faults that are determined by the memory type".

newlibc tries to be a bit smart about this reading the DCZID_EL0
register before deciding whether using 'DC ZVA' or not. While this is a
good idea for code running in EL0, currently the Zephyr kernel is
running in EL1. This means that the value of the DCZID_EL0 register is
actually retrieved from the HCR_EL2.TDZ bit, that is always 0 because
EL2 is not currently supported / enabled. So the 'DC ZVA' instruction is
unconditionally used in the newlibc memset() implementation.

The "standard" solution for this case is usually to use a different
memset routine to be specifically used for two cases: (1) against IO
memory or (2) against normal memory but with MMU disabled (which means
all memory is considered device memory for data accesses).

To fix this issue in Zephyr we avoid calling memset() when clearing the
bss, and instead we use a simple loop to zero the memory region.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-01-14 13:37:47 -08:00
Andrzej Głąbek 4f44caf229 boards: nrf21540dk_nrf52840: Fix minor imperfections in documentation
Fis a few issues, mostly typos, in the nRF21540 DK board documentation.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-01-14 21:43:43 +01:00
Anas Nashif 827ecb7bd0 twister: fix build_on_all configuration
Logic for scope of platforms to be checked was changed and this options
now only applies to limited scope, fix this and reset scope when a
testcase declares it needs to build on available platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-14 13:59:42 -05:00
Julien Massot 6e5e7c1640 west.yml: Update cmsis revision
DSP: Fix invalid CMakeList configuration for arm_sin_cos
Core-R: Make GIC and TIM configurable

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-01-14 12:44:34 -06:00
Katsuhiro Suzuki 32f23059a2 dts: bindings: add IRQ priority support for SiFive PLIC
This patch adds IRQ priority support for SiFive PLIC by device-tree.
Some IRQ sources of plic use Kconfig to set priority of their IRQ.

- AON: no driver
- I2C, SPI, PWM: not use IRQ
- GPIO, UART: default 1

So this patch specifies IRQ priority 1 for all sources.

Currently these drivers (gpio and uart) do not support that they get
and use IRQ priority from device-tree. We need more patches.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-01-14 12:43:58 -06:00
Andrzej Puzdrowski d9c308cce9 tests/subsys/dfu/mcuboot: support mcuboot max alignment
MCUboot support flash write-bock-size up to BOOT_MAX_ALIGN.
This patch takes this into account.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-01-14 18:03:38 +01:00
Andrzej Puzdrowski 049dac2a8a modules: introduce MCUBOOT_BOOTUTIL module
Some parts of subsys/dfu/boot code are re-implementations of
what is implemented in the MCUBoot repository.

Mcuboot's repository already provide implementation of function
required for application for interact with the MCUboot.

This patch introduces new MCUBOOT_BOOTUTIL module which covers
common code which is used in the bootloader and the chainnloaded
application.

dfu/boot: use MCUBoot's source code

Module was reworked so it start using MCUBoot's
bootutil_public API instead of copied code.

Reworked boot_is_img_confirmed() used MCUBoot's API
for determine image_ok flag.

mcuboot_shell switchd to use MCUboot's boot_read_swap_state_by_id()
This is MCUBoot function, use it for avoid linking conflict.

test/subsys/mcuboot: fix `test_write_confirm`

dfu/boot library was reworked so it uses MCUboot's bootutil_public
library whenever it can.
The library required that image was marked as copy-done before it
can be pending.
This patch adds such mark which fixes the test.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-01-14 18:03:38 +01:00
Guennadi Liakhovetski 9bfee48d5d xtensa: fix an assembly warning in start_address.S
Add missing .end and .size in start_address.S

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-01-14 11:41:39 -05:00