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10294 commits

Author SHA1 Message Date
Gerard Marull-Paretas c759a35d08 drivers: use DT_INST_ENUM_IDX(_OR) macros
Replace `DT_ENUM_IDX(_OR)(DT_DRV_INST(...),` pattern with
`DT_INST_ENUM_IDX(_OR)(...,`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-18 19:12:07 -05:00
Johann Fischer fdcc104455 usb: remove Kconfig option USB_UART_CONSOLE
Since there are no more users and dependencies of
Kconfig option USB_UART_CONSOLE in the tree,
remove the remains and the option USB_UART_CONSOLE.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-11-18 14:29:18 +01:00
Johann Fischer 6fd0843809 drivers: console: limit scope of CONFIG_USB_UART_CONSOLE
Do not change init level and priority of console driver
if Kconfig option CONFIG_USB_UART_CONSOLE is enabled because
commit 37f4d9ba63
("usb: cdc_acm: rework cdc_acm_poll_out to non-blocking")
changed CDC ACM UART driver so that it more closely mimics
the real controller and CDC ACM UART driver now uses the same
init level and priority as regular serial driver.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-11-18 14:29:18 +01:00
Manojkumar Subramaniam 86a6280ed7 drivers: clock_control: stm32h7: Add logic to handle SMPS config
Some STM32 SoC supports an internal SMPS

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2021-11-18 13:56:39 +01:00
Thomas Stranger cfac53b76f drivers: flash: stm32g0: dual bank handling
This commit fixes dual bank flash handling on stm32g0 targets.
In contrast to other Series (G4, L5) the flash page size does not change
in single bank configuration (2KiB in both configurations).

nSWAP_BANK:
While the reference manual(RM) only documents:
"This bit selects the bank that is the subject of empty check upon boot"
as expected, this behaves similar to BFB2 on G4 and SWAP_BANK on L5.
It has been observed that this bit swaps the address mapping of bank1
and bank2, regardless of DUAL_BANK bit being set or not.
As documented in the RM the nSWAP_BANK bit is ignored when the BOOT_LOOK
bit is set. This applies to the empty check as well as the address
mapping.

On this Series FLASH_CR_BKER must be set in single-bank as well as
dual-bank configuration for erase operations on bank2 regardless of
the swap status.

On a G0B1RE (dev-id: 0x467) I could not observe a difference between
DUAL_BANK flash option bit set and not.
It this may be different on 256KiB Flash targets.
The HAL indicates that "FLASH_SALES_TYPE_0" only uses a single bank if
OB_DUAL_BANK_VALUE is not set, but as I don't know which SoC this is
and I can't test the behaviour and the driver does not take this into
account.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-11-17 11:06:59 -05:00
Thomas Stranger 5bf11c250d drivers: flash: stm32g0: preparation for dual bank handling
This commit makes no functional changes, it only refactors the
driver such that dual bank flash handling can be easily added.

Instead of using HAL macros directly in the code, new macros
with STM32G0 prefix are defined.
The erase_page function gets passed the offset instead of the page,
and the FLASH CR reg is written once with all erase parameters.
flash_stm32_wait_flash_idle is already called before each
write to CR, consequently it is also made sure CFGBSY flag
is not set.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-11-17 11:06:59 -05:00
Thomas Stranger 4c862c14c1 drivers: flash: stm32: wait for CFGBSY & BSY2 in wait_flash_idle
Some series (namely g0, u5, wb, wl, ?) use CFGBSY to indicate
that FLASH_CR is not ready to be modfied.

This commit adds this flag additionally to other the flash busy flags,
in flash_stm32_wait_flash_idle such that the driver waits before
trying to modify PG, PNB[6:0], PER, and MER bits in FLASH_CR.

Additionally, dual bank variants of STM32G0 have a seperarate BSY2 flag
for flash bank two.
Until now this was not yet checked in flash_stm32_wait_flash_idle.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-11-17 11:06:59 -05:00
Thomas Stranger f15f9dfd72 flash: stm32: fix g0 error flags and move ifdef-ery to header
In STM32G0 HAL FLASH_FLAG_xxx defines don't follow the pattern of
other Series to simply redefine the FLASH_SR_xxx Msk.
Instead an ID for the SR reg and the position of the Error flag
are defined.

As a result error checking in flash_stm32_check_status was not working
until this fix on stm32g0 series.

In order to avoid complexity in the driver, the ifdef-ery of the flags
was moved to the header file.
Other series except g0 use FLASH_FLAG_xxx defines, because those
are valid for both cores in dual core(wl) and in secure/non-secure
targets(l5,u5).
FLASH_STM32_SR_ERRORS mask is introduced to check for any active error
in the SR.

The flags for SIZERR, MISERR, FASTERR are newly introduced.
the latter two are only required once fast programming is used,
which is not yet the case for any series.

The FLASH_SR_OPTVERR flag (option validity flag) is also present
in the SR, but is not added.
Also ecc errors are generally not checked, but these are in a different
register.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-11-17 11:06:59 -05:00
Thomas Stranger 519f5ffcde drivers: flash: stm32: mv security-mode dependent defines to header
An attempt to simplify the ifdef-ery around FLASH_SR is made.
Define Registers and flags in the header file instead of including
several individual operations in the driver.

FLASH_FLAG_BSY is not only defined for STM32L5, but also other series.
Therefore use this flag instead of FLASH_SR_BSY.
Only the g0 series definition is not valid in our context,
therefore use FLASH_SR_BSY1 instead.

No functional changes, only refactoring.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-11-17 11:06:59 -05:00
Jani Hirsimäki d2a7d29a08 drivers: net: ppp: configurable autostart
New Kconfig CONFIG_PPP_NET_IF_NO_AUTO_START
to have an option to disable of starting of the PPP networking interface
right after the init.

Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
2021-11-16 21:25:47 -05:00
Tim Lin e29a15c0e3 ITE: drivers/serial: add the UART driver for the PM callback function
IT8XXX2 uses shared ns16550.c driver which does not provide a power
management callback(pm_action_cb), so create driver to handle
IT8XXX2 specific UART features.

note: pm_action_cb(old name: pm_control_fn)

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-11-16 21:23:42 -05:00
Wealian Liao 1b416f7fd1 driver: gpio: npcx: Fix API header
For port_set_bits_raw(), port_clear_bits_raw(), and port_toggle_bits(),
the second parameter sould be gpio_port_pins_t type. Currently, it
doesn't have other side effect, but it sould be fix. This commit fixes
it.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-11-16 21:22:48 -05:00
Alexandre Bourdiol 3a60344522 drivers: pwm: stm32: move "st,prescaler" to timers instead of pwm
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
This change also prepares the introduction of timer based counter
(which requires prescaler at timer level)
For compatibility reason temporarily use pwm prescaler if it exists,
otehrwise use timers prescaler.
And thus avoid to avoid breaking boards out of tree.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-11-16 09:55:30 -06:00
Lucas Dietrich f7f0bc7022 drivers: can: Fixed timeout values comparison
Trivial fix of compilation error "invalid operands to binary "
when CONFIG_CAN_AUTO_BUS_OFF_RECOVERY = n

Fixes #40290

Signed-off-by: Lucas Dietrich <ld.adecy@gmail.com>
2021-11-16 10:14:02 -05:00
Lukas Gehreke 0544f5dbc3 drivers: gpio: Added mcp230xx GPIO driver.
Added driver for the mcp230xx series I2C-based GPIO chips.

Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
2021-11-16 10:13:14 -05:00
Jay Vasanth 70d4559fdf Microchip: MEC172x: eSPI driver
Updates to MEC172x eSPI driver to support ACPI shared
memory region and EC Host Command Subsystem through
ACPI_EC1 and Embedded Memory Interface (EMI).

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2021-11-16 10:43:42 +01:00
Maureen Helm 836651b453 drivers: gpio: Refactor drivers to use shared init priority
Refactors all of the on-chip GPIO drivers to use a shared driver class
initialization priority configuration, CONFIG_GPIO_INIT_PRIORITY, to
allow configuring GPIO drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.

Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_DEFAULT or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.

Driver-specific options for off-chip I2C- or SPI-based GPIO drivers are
left intact because they often need to be initialized at a different
priority than on-chip GPIO drivers.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-11-15 14:38:55 -05:00
Christopher Friedt 7c6039a1d2 drivers: serial: nrfx: refactor for atomic_t as long
This driver aliases a regular `int` to `atomic_t` but that
should be updated to `long` with the change to `atomic_t`.

Added a comment to highlight that the variable was aliased.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-11-15 09:59:01 -05:00
Christopher Friedt 3e86c627f7 kernel: atomics: update print specifiers for atomic_t
The print specifier for `atomic_t` should be updated
to `%ld`, `%lu`, or `%lx` to account for the type
change of `atomic_t` to `long`.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-11-15 09:59:01 -05:00
Andy Ross 0b400d86c0 drivers/timer/cavs_timer: Fix race in k_cycle_get_64()
In commit 918a574c88 ("clock: add k_cycle_get_64") this driver was
augmented with a count64() method to get a 64 bit cycle output from
the two-32-bit-word device registers.

Unfortunately it appeared to be trying to use a spinlock around the
two (low/high) reads to protect against overflow.  But that doesn't
work: spinlocks protect against other CPU code using the same
spinlock, not against a hardware counter that is incrementing in real
time!

Thankfully there was already a count() routine in place that does a
detect-overflow-and-retry loop to solve this.  Use that.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-11-15 09:54:31 -05:00
Emil Gydesen 12decc70d0 Bluetooth: ISO: Add bitmask for retrieving iso header lenght
Add a macro to retrieve the iso data load length (the
length stored in the iso header) with a bit mask that
ensures that we only take the first 14 bits.

This is to remove any RFU bits that may have been set.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2021-11-12 14:52:33 +01:00
Rafał Kuźnia e1ba2f75cf drivers: ieee802154: nrf5: fix NULL pointer dereference
When a frame is sent with a cleared ACK request bit, the transmit
metadata contains a NULL pointer to the ACK frame.

The pointer must not be dereferenced in such case.

Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
2021-11-12 14:51:54 +01:00
Dino Li 6d8f1bf6d9 soc: it8xxx2: add support for eSPI driver
This supports eSPI slave, virtual wire, and peripheral functions.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-11-12 14:51:10 +01:00
Felipe Neves b50cb2a537 drivers: counter: esp32: add support for esp32c3
to the unified esp32 counter driver.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-11-11 19:14:15 -05:00
Wouter Cappelle ebed957005 modem: Update modem sockets poll to allow eventfd
The modem sockets poll implementation does not allow
a combination of poll on modem sockets and on other sockets
like eventfd. This blocks trivial application signalling. Current
users are using a poll timeout, which needs to check if other
work needs to be done in the thread (eg: lwm2m engine).
To allow proper signalling with eventfd, the non offload poll
methods needs to work for the modem sockets.
This commit is implementing this for POLLIN.

Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
2021-11-11 19:12:46 -05:00
Henrik Brix Andersen 2e8cc9f9b0 drivers: gpio: add combined drive strength flags and mask
Introduce combined GPIO drive strength flags for GPIO controllers only
supporting either default or alternative drive strength regardless if
the pin is driven to a high or a low level.

Fixes: #30329

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-11-11 07:20:12 -05:00
Alex Sergeev 1c53e68459 drivers: ethernet: mcux: Bugfix ptp_clock_adjust
ptp_clock_adjust() API call for mcux driver has a bug where
increment gets compared with an unsigned int, causing it to
always return -EINVAL.

Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
2021-11-11 07:05:22 -05:00
Johan Hedberg 224468f35b Bluetooth: drivers: h4: Fix uart_fifo_fill return value handling
The return value of uart_fifo_fill could potentially be negative, so
make sure the code doesn't do anything bad in that case.

Fixes #39823

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2021-11-10 14:17:50 +01:00
Johan Hedberg cc2d5f8a45 Bluetooth: drivers: h4: Fix uart_fifo_read return value handling
Make sure negative error returns from uart_fifo_read() are correctly
handled.

In the same go, the logic of reading packet headers (ACL/event/ISO) is
refactored into its own helper function. This also fixes having an
appropriate name for the variable that tracks how many header bytes have
already been read (it was called "to_read" and now it's called
"bytes_read").

Fixes #39805

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2021-11-10 14:17:50 +01:00
Nick Ward fa94be591d drivers: spi_nrfx_spim: workaround for nRF52832 errata anomaly 58
See:
https://infocenter.nordicsemi.com/index.jsp?topic=%2Fstruct_nrf52%2Fstruct%2Fnrf52832_errata.html
https://infocenter.nordicsemi.com/pdf/nRF52832_Rev_3_Errata_v1.0.pdf

Code derived from the example PAN 58 workaround code.

Adds a new nRF SPIM Devicetree binding property called
anomaly-58-workaround that allows the workaround to be enabled
if required per SPIM instance.

Signed-off-by: Nick Ward <nick.ward@setec.com.au>
2021-11-09 20:04:45 -05:00
Daniel Leung 40c2b1e99c uart: add API support for wide data
This adds API to support datum more than 8-bit wide. Drivers are
still responsible for the implementation.

Fixes #31914

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-09 19:44:38 -05:00
Dominik Ermel bd6cc1fe35 drivers/flash/nrf_qspi_nor: Modify qspi_erase loop condition
The commit removes an error check from the erase loop and instead
add breaks in places where errors that would break an execution of
the loop occur.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2021-11-09 16:02:26 -06:00
Francois Ramu 2185863d3b drivers: adc: add the stm32U5 devices to the adc driver
The STM32U5x device has ADC instance of different versions
similar to the stm32H7 about the oversampling.
ADC1 of 14bit resolution has a ratio from 1..1024 on OSR[9:0]
ADC4 of 12bit resolution has a ratio on OVSR[2:0]

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-11-09 15:59:23 -06:00
Francois Ramu e26fcc47b9 drivers: adc: stm32 oversampling includes the ADC of the stm32U5 soc
This commit extends the configuration of the oversampling
ratio and shift for the stm32U5xx soc, depending on the
ADC instance: ratio is a value from 1..1024 or a LL_ADC_OVS_RATIO_x
to be used with the stm32Cube LL function.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-11-09 15:59:23 -06:00
Francois Ramu cf60639390 drivers: serial: stm32 usart driver clears the RXNE through flag
For some stm32 soc devices, the USART (or UART) flag RXNE is cleared
by the LL_USART_ClearFlag_RXNE function which directly writes
the RXNE bit of the Status register. This is the case with the
stm32F1x, stm32F2x,stm32F4x, stm32L1x.
Some other are using the Rx Data Flushing function.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-11-09 15:43:48 -05:00
Sylvio Alves b0c48a2182 drivers: uart: esp32: set device to initialize pre-kernel
Uart post kernel initialization does not allow starting shell
properly. This issue was added in UART unifying PR.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-11-09 15:18:15 -05:00
Emil Lindqvist 38eed4a49e sara-r4: increase socket processing prio
Higher socket processing prio is required for offloaded sockets.

Resolves #40074

Signed-off-by: Emil Lindqvist <emil@lindq.gr>
2021-11-09 14:40:54 -05:00
Bartosz Bilas ee95b5317a drivers: sensor: lsm6dsl: improve driver initialization
Take into account the return code of the bus_init function
and propagate codes from the init* functions to the user
instead of hardcoded -EIO. While at it set the ERROR
level message to the logs.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2021-11-09 08:32:13 -06:00
Andrzej Głąbek 760adff120 drivers: spi_context: Correct alignment of LOG_DBG() parameters
so that the call looks nicer.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-09 12:46:08 +01:00
Andrzej Głąbek 688d81813e drivers: spi_context: Fix handling of zero-length buffers
In some cases, it is quite useful to have the possibility to also
include zero-length buffers in a buffer set used in transfers
(for example, when frames in a protocol consist of several parts,
of which some are optional). So far, the behavior of spi_context
update functions was that the transfer in a given direction was
finished when a zero-length buffer was encountered in the buffer
set. Change those functions to simply skip such buffers. Correct
in the same way also the spi_context_buffers_setup() function.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-09 12:46:08 +01:00
Andrzej Głąbek 3489ca9da2 drivers: spi_context: Do not use transfer timeout in slave mode
Do not use any timeout in the slave mode, as in this case it is not
known when the transfer will actually start and what the frequency
will be.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-09 12:46:08 +01:00
Henrik Brix Andersen 5bc0451f72 drivers: can: remove DT_CHOSEN_ZEPHYR_CANBUS_LABEL macro
Remove the DT_CHOSEN_ZEPHYR_CANBUS_LABEL macro and replace it with
DEVICE_DT_GET(DT_CHOSEN(zephyr_canbus)) were possible.

Where both devicetree CAN controllers and Kconfig specified CAN loopback
controllers are supported, the macro is replaced with
DT_LABEL(DT_CHOSEN(zephyr_canbus)) for now.

This is the first pass for removing the requirement for devicetree
labels for CAN controllers.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-11-09 11:19:50 +01:00
Ryan Erickson 270608139f modem: hl7800: remove NEWLIB_LIBC dependency
Zephyr LIBC minimal has definitions for struct tm.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-11-09 11:19:02 +01:00
Ruibin Chang e505f2476a ITE drivers/timer: update timer_init() definition
Update timer_init() definition.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2021-11-09 11:18:42 +01:00
Lukasz Maciejonczyk c930262fd8 drivers: ieee802154: nrf5: refactor storing mac keys
This commit makes nrf5_config_mac_keys function more generic.
Is uses lookup table for storing keys to override. It removes old keys
before storing new ones.

Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
2021-11-09 11:18:31 +01:00
Andrzej Głąbek f7466d28fd drivers: spi_nrfx_spim/spi: Fix initialization of CS GPIOs
This is a follow-up to commits 99daca9bba
and ae03c0a6bf.

nRF SPI driver shims cannot use devicetree instance indexes, they need
to use the DT_NODELABEL macro and SoC peripheral instance indexes.
Correct the macros used in initialization of CS GPIOs in those shims.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-11-09 11:11:19 +01:00
Benjamin Lindqvist 0ab1bf42b3 drivers: sensor: lis2dh: Level triggered interrupts
Both DRDY and motion interrupts behaves like level signals since they
remain asserted until they're cleared. Configuring them as edge
interrupts is dangerous because if we ever miss an interrupt, it may
never get cleared and thus will never trigger again.

Treating them as edge signals seems to have no advantages, other than
being marginally simpler to implement.

The patch has gotten many hours of run-time on real hardware using a
nRF52-based board and a LIS3DH with both interrupts connected and
heavily utilized.

Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
2021-11-08 15:37:57 -06:00
Christopher Friedt 918a574c88 clock: add k_cycle_get_64
This change adds `k_cycle_get_64()` on platforms that
support a 64-bit cycle counter.

The interface functions `arch_k_cycle_get_64()` and
`sys_clock_cycle_get_64()` are also introduced.

Fixes #39934

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-11-08 13:41:53 -05:00
Bartosz Bilas f445cb9a7e drivers: ieee802154_rf2xx: convert to use spi_dt_spec
Convert ieee802154_rf2xx driver to use `spi_dt_spec` helpers.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-11-08 11:06:16 -05:00
Johann Fischer 02c32d4474 usb: move USB_DEVICE_REMOTE_WAKEUP option to drivers
Kconfig USB_DEVICE_REMOTE_WAKEUP option depends only on
USB device controller capability, but is not controlled
by the USB device controller drivers configuration.
Move USB_DEVICE_REMOTE_WAKEUP option to drivers and
make it promptless.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-11-08 17:01:32 +01:00