Product URL: https://www.ti.com/product/CC1352P7
Datasheet : https://www.ti.com/lit/ds/symlink/cc1352p7.pdf
Features:
Powerful 48-MHz Arm® Cortex®-M4F processor
* 704KB flash program memory
* 256KB of ROM for protocols and library functions
* 8KB of cache SRAM
* 144KB of ultra-low leakage SRAM with parity for
high-reliability operation
* Dual-band Sub-1 GHz and 2.4 GHz operation
Updates:
* Remove CC1352P7_LaunchXL due to compliance checks
* Add CC1352P7 updates
* Update hal_ti for CC1352P7 support
* Remove blank line at end of modules/Kconfig.simplelink
* Split struct and typedef for pinctrl_soc_pin/pinctrl_soc_pin_t
* Reference cc13x2_cc26x2/pinctrl_soc.h
* Reference cc13x2_cc26x2/soc.h
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
Microchips PolarFire-SoC Icicle Kit has 4x UART interfaces available
via single micro USB and 1x UART for programming and debugging via micro
USB. Add the remaining UARTs to the Devicetree
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
Some lines of the mpfs_icicle Devicetree contained a jumble of white
space and tabs. Just use tabs
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
Add support for the TI TPS382x series. The IC has an input pin which
should be toggled by the processor and a output pin which should be
connected to the RESET input of the processor. The timeout is not
configurable.
This device can be used by devices which does not have any internal
hardware watchdog device.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Modifying counter drivers (rtc and timer) to rely completely on
device tree and not on Kconfig of MDK flags.
Adapting dtsi for all SoCs and adapting test configuration.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Adds a driver for the Nordic nRF GPREGRET registers and adds
entries to the SoCs for this peripheral.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add support for virtual UART device that uses ARC Hostlink channels
for data transfers. Due to the Hostlink principle, this driver
supports only polling API.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
This symbol allows users of the driver to disable the
power management feature of just this sensor if they are
not using the int_gpios pin of the BQ274XX.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
interrupts property was previously added with "required: false", but
when required was removed (redundant), the interrupts property was left
dangling.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
To enable Bluetooth controller coexistence feature, there is
implementation of ticker task, which aborts any ongoing radio events
during assertion of the grant pin. This solves the co-existence issue
in the role of the subordinate transceiver.
Signed-off-by: Tomáš Beneš <tomas@dronetag.cz>
This commit removes the deletion of the `sram0` node, which resulted in
the compat string `mmio-sram` missing from the final devicetree when
building stm32l4r5-based platforms in Zephyr.
This bug was introduced in
306dea6ff3.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The zephyr,gpio-keys is now emitting input events, so it makes sense to
require a key code to be set. Change the zephyr,code property to be
required and add an example in the binding description.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Port the gpio_keys_zephyr driver from the gpio subsystem with a
dedicated API to the input subsystem reporting input events.
Move the test as well, simplify the cases a bit since the API is simpler
now.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The 200ns reset time specified in the datasheet are a minimum time; and the
nanoseconds were being rounded to whole microseconds anyway.
Also make it the same type as `config_delay_us` (`uint16_t`).
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
From FPGA-TN-02001-3.3 "iCE40 Programming and Configuration":
> After driving CRESET_B High or allowing it to float High, the AP must
> wait a minimum of 1200 µs, allowing the iCE40 FPGA to clear its internal
> configuration memory.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Change the preprocessor identifier from CONFIG_SOC_ESP32C3 to
SOC_GDMA_SUPPORTED so it can include ESP32S3 in GDMA routines.
Remove hardcoded values from hal calls to use dma_host instead.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
The board embeds an audio codec IC, Cirrus CS42L73. While there is no
in-tree driver for it, we need a binding to describe how it is wired in
the board, e.g. for IRQ/RESET lines.
Following Linux binding for the same IC, create one in
dts/bindings/sound. Note that Linux binding is less complete/outdated.
Ref. https://statics.cirrus.com/pubs/proDatasheet/CS47L63_DS1249F2.pdf
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
There is a spi-flash fl256s on emsdp board, which can be
contolled by DesignWare SPI driver. Now add DW SPI and
SPI-FLASH support for emsdp board.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
Remove SPI2 from F070 (not present on F070x6) and add it to F070xB.
Add it to F051 and remove it from F091 (since it is already defined).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
