This commits adds the DA14695 variant.
The main difference with the DA14699 is a smaller package with less
GPIO.
Signed-off-by: Niek Ilmer <niek.ilmer.aj@renesas.com>
If the channel was used for 16bit in the once, subsequent 32bit sample size
audio will be broken since the SCS bit remains set.
Example sequence with SOF:
normal audio playback with 16bit
ChainDMA audio playback with 16bit
normal audio playback with 16bit
The last playback results garbled audio.
Introduce intel_adsp_hda_set_sample_container_size() helper function
to handle the SCS bit and use it in the driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
- if we have input enable use CY_GPIO_DM_xxxx else
CY_GPIO_DM_xxx_IN_OFF;
- added bias_high_impedance option
- Updated HIGHZ drive mode, now it sets if:
--- we have bias_high_impedance
--- or if input_enable and no addition bias mode
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Coupling in code between workarounds for anomaly 160 and anomaly 165
(pretick) is decreased.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
It might happen that while some interrupt handler other than for RTC0
or RTC1 (e.g. for RADIO) is executed, the scheduled pretick CC triggers.
This starts pretick pulses due to the loop through IPC. The change
in pretick schedule did not stop the pretick pulses going through IPC
loop, what caused heavy increase in power consumption.
This commit fixes this behavior.
Added also clarifications for Kconfig option `SOC_NRF53_RTC_PRETICK`.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
For RTC0 events the RTC1 pretick event was not cleared what caused the
WDT to be not stopped. This resulted in increased power usage.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
rand32.h does not make much sense, since the random subsystem
provides more APIs than just getting a random 32 bits value.
Rename it to random.h and get consistently with other
subsystems.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Do not clock the LPC55xxx cores from PLL1 when CONFIG_FLASH is set. This
is required due to the following limitation of the flash controller
(documented in the reference manual):
Flash operations (erase, blank check, program) and reading a single word
can only be performed for CPU frequencies of up to 100 MHz. These
operations cannot be performed for frequencies above 100 MHz.
The PLL1 clock source will result in a core clock of 150MHz, which
violates this requirement.
Fixes#62963
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add the ESP32-C3-WROOM-02 modules with 4 or 8 MiB flash. The
temperature and antenna / connector variants are not mentioned
explicitely as they do not influence the software.
Signed-off-by: Detlev Zundel <dzu@member.fsf.org>
Increase the `ndev` of PLIC to the max of 1024 from 53, as
supported by the RISCV PLIC. The total number of IRQs is now
1035(1024 + 11), up from 64(53 + 11).
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Added SOC_GECKO_HAS_RADIO symbol, to indicate that a SoC has a radio
phy, so that radio related code would only apply to devices with radio.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
When build ISH project in Chromium repo, the coverage report error:
zmake build --coverage rex-ish
lcov: ERROR: no valid records found in tracefile.
To fix this, enable coverage config to link ISH boards with coverage
library.
Signed-off-by: Li Feng <li1.feng@intel.com>
Commit 759e07bebe ("intel_adsp: move memory window setup to
PRE_KERNEL_1") moved memory window setup from EARLY to
PRE_KERNEL_1. Similar change must be done to boot_complete, or
otherwise boot-up sequence will not be completed correctly
on all platforms.
Suggested-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The `SOC_NRF53_RTC_PRETICK` option is now allowed to be used with
`NRF_802154_RADIO_DRIVER`.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
The nrf53 pretick can be used with non-zero
`NRF_RTC_TIMER_USER_CHAN_COUNT` Kconfig option.
The nrf53 pretick requires just one RTC1 CC channel.
The nrf53 pretick handles also RTC1 and RTC0 both CCs and OVERFLOW
events by examination of events scheduled on them. The pretick is set
based on number of ticks to the closest event scheduled that can trigger
an interrupt.
Because the operation in `z_arm_on_enter_cpu_idle` hook would
take too much time with interrupts disabled, the
`z_arm_on_enter_cpu_idle_prepare` hook enabled by Kconfig option
`ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK` is used. It performs RTC0 and RTC1
examination, and sets pretick without interrupts being blocked.
The LDREX/STREX are leveraged to detect if exception took place
between start of `z_arm_on_enter_cpu_idle_prepare` and
`z_arm_on_enter_cpu_idle`. If exception has not been taken, the pretick
calculation can be trusted because source data could not changed and
too much time could not pass. Otherwise the sleep attempt is disallowed,
the idle will loop again and try later.
Prompt for `SOC_NRF53_RTC_PRETICK` Kconfig option allows to control
this option by an user and turn the feature off if necessary.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Add RTC pretick option that triggers HW activity one tick before and
RTC event that leads to the interrupt. Option is active only on nrf53
network core.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
As a development helper, add a kconfig option to
automatically start the MCU this Zephyr image is built
for during HW boot, even if in other circumstances
this MCU would not start automatically (for ex. because
another core is meant to release its reset).
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
To be more accurate, as this option represents a microcontroller
number, not a CPU number.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add a new kconfig option to be able to pass extra images to the
native simulator build.
So one can, for ex., use one application build to produce one core image,
and at the same time have it produce the final link with the native
simulator runner and the other MCU images.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This renames the board from qemu_xtensa_dc233c to
qemu_xtensa_mmu to better signal that it is for testing with
MMU on QEMU Xtensa. Also turn on testing by default to make
sure future changes will not break Xtensa MMU support.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
On S32K344, the offset in memory map between each channel
is 0x4000 for most channels, but there is specific case is
between channel 11 and 12 which is 0x1D4000 instead. As a
consequence, 32 channels are divided to two parts: one
starts from channel 0 -> 11. The other is from channel 128
to 145. The channel gap is from 12 -> 127.
For user and data structures in shim driver, the channel's
value comes from 0 --> 31. Above constraint will be counted
when interact with the mcux sdk
Beside that, the DMAMUX register in this platform is very
specific, not in identical with DMAMUX channel, so shim
driver is updated to cover this case
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
MEC172X has 2 package sizes with additional pins on the -LJ package.
This commit separates the package-specific parts into different files.
In addition, this patch removes unnecessary package-specific enums in
favor of calculated offsets into the desired registers.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
These headers are using things like `uint32_t` & devicetree
macros, so they should include the `devicetree.h` & `types.h`.
Otherwise they depend on the parent file to have those headers
included before they are included.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The old CONFIG_UART_NS16550_ACCESS_IOPORT has been used to
indicate whether to access the NS16550 UART via IO port
before device tree is used to describe hardware. Now we have
device tree, and we can specify whether a particular UART
needs to be accessed via IO port using property io-mapped.
Therefore, CONFIG_UART_NS16550_ACCESS_IOPORT is no longer
needed (and thus also CONFIG_UART_NS16550_SIMULT_ACCESS).
Remove these two kconfigs and modify code to use device tree
to figure out how to access the UART hardware.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The symbol _end is used to indicate the start of heap in
the common libc malloc code. On ACE, heap is in uncached
area. However, _end was in the cached area while end of
heap is in uncached area. This resulted in incorrect
calculation of heap size. So move _end into uncached
area so correct heap size can be calculated.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Select the newly introduced nrf53 compatible kconfig options.
These are common both for real HW and for simulated HW,
allowing SW to behave appropriately for both.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add support for SMARTDMA to RT5xx SOCs. SMARTDMA ram banks will be
powered up, so code can be programmed into this region for the SMARTDMA
engine.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adds CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP to allow debugger attaching in
sleep/stop mode of STM32 parts. Mainly useful for debugging. Move DBGMCU
from part-sepcific power.c to common soc_config.c. CONFIG_USE_SEGGER_RTT
depends on this as well.
Signed-off-by: Roland Lezuo <roland.lezuo@embedded-solutions.at>
Add node for VREF0 peripheral to LPC55S3X SOC DT
Clock VREF peripheral if status = okay in DT
Enable VREF on lpcxpresso55s36
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Enable clock control driver for NXP S32ZE SoCs and add clock sources
definitions for devicetree.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
PRE_KERNEL_1 is more suited for dealing with devices, so move out of
EARLY.
Verified on hardware and things seem to behave the same. Something was
changed since this was first introduced as this was not possible for
some reason.
Fixes#62627
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The ARM Cryptocell 310/312 IP is wrapped by Nordic specific registers.
It is organized as follows:
- Base address: Nordic wrapper
- Base address + 0x1000: ARM Cryptocell IP registers
Following more standard devicetree conventions, use a single node for
what is exposed as a single peripheral. The node contains 2 register
entries, one for the wrapper and a second one for the 3rd party IP.
Compatibles are used from more specific (nordic,cryptocell) to more
generic (arm,cryptocell-3xx).
Other minor fixes: peripheral is disabled by default (as it should be in
SoC dts files).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Just like for the nrf52_bsim let's add helper kconfig symbols
which can be used to identify we are running in a target that
is compatible with the real HW but is not the real HW.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit:
* adds the `CONFIG_SOC_GECKO_SERIES0` Kconfig option for Gecko Series 0
SoCs
* selects the proper `CONFIG_SOC_GECKO_SERIESx` option where it's currently
missing
Fixes#62806.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Flash segments require VMA to proper work. Executing from LMA
is not possible. Current implementation did not take into account
runtime iterable rom sections that any application could implement.
In the above cenario and as reported in the issue below, ESP32 won't run
when those ROM sections are created in application level.
This change make sure all flash segments are properly mapped
accordingly.
Fixes#61834
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
