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767 commits

Author SHA1 Message Date
Andrzej Kuros d44e96e486 nrf53: pretick with NRF_802154_RADIO_DRIVER
The `SOC_NRF53_RTC_PRETICK` option is now allowed to be used with
`NRF_802154_RADIO_DRIVER`.

Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
2023-09-30 18:48:19 +02:00
Andrzej Kuros e03d5d4c6d nrf53: RTC pretick allows user channels and require just one CC
The nrf53 pretick can be used with non-zero
`NRF_RTC_TIMER_USER_CHAN_COUNT` Kconfig option.

The nrf53 pretick requires just one RTC1 CC channel.

The nrf53 pretick handles also RTC1 and RTC0 both CCs and OVERFLOW
events by examination of events scheduled on them. The pretick is set
based on number of ticks to the closest event scheduled that can trigger
an interrupt.

Because the operation in `z_arm_on_enter_cpu_idle` hook would
take too much time with interrupts disabled, the
`z_arm_on_enter_cpu_idle_prepare` hook enabled by Kconfig option
`ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK` is used. It performs RTC0 and RTC1
examination, and sets pretick without interrupts being blocked.

The LDREX/STREX are leveraged to detect if exception took place
between start of `z_arm_on_enter_cpu_idle_prepare` and
`z_arm_on_enter_cpu_idle`. If exception has not been taken, the pretick
calculation can be trusted because source data could not changed and
too much time could not pass. Otherwise the sleep attempt is disallowed,
the idle will loop again and try later.

Prompt for `SOC_NRF53_RTC_PRETICK` Kconfig option allows to control
this option by an user and turn the feature off if necessary.

Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
2023-09-30 18:48:19 +02:00
Krzysztof Chruściński 31eaffdf05 nrf53: Add RTC pretick
Add RTC pretick option that triggers HW activity one tick before and
RTC event that leads to the interrupt. Option is active only on nrf53
network core.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2023-09-30 18:48:19 +02:00
Gerard Marull-Paretas 691facc20f include: always use <> for Zephyr includes
Double quotes "" should only be used for local headers.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-14 13:49:58 +02:00
Gerard Marull-Paretas 12b2ee54e3 drivers: timer: s/device.h/init.h
Timer "drivers" do not use the device model infrastructure, they are
singletons with a SYS_INIT call. This means they do not have to include
device.h but init.h. Things worked because device.h includes init.h.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-08-29 11:29:18 +01:00
Gerard Marull-Paretas 9c961571a2 modules: cmsis: move glue code to modules/cmsis
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).

To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.

All files including CMSIS have been updated.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-08-24 13:20:21 +02:00
Maciej Sobkowski 5ffce32376 drivers: timer: Add driver for Ambiq system timer (STIMER)
This commit addst support for the system timer peripheral which
can be found in Apollo4 SoCs.

Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 10:48:58 +02:00
Marek Matej 6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Francois Ramu 6254527343 drivers: timer: stm32 lptim driver check clock_control_on return code
This PR is Calling "clock_control_on" and checking return value
(as is done elsewhere 10 out of 11 times)
CID 322066:  Error handling issues  (CHECKED_RETURN)

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-07-19 10:14:30 +00:00
Erwan Gouriou 3359259a69 drivers: timers: Add LPTIM support for STM32WBA
Add LPTIM support for STM32WBA

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-07-12 11:48:10 +02:00
Florian Grandel 75c83edc48 dts: ti: cc13xx_cc26xx: devicetree sysclk alignment
This change introduces the "_rtc_timer" suffix for the system tick timer
driver "compatible" property and aligns naming conventions with the
actual CC13/26xx SoC series product policy.

This frees up the "_rtc" namespace to introduce additional APIs based on
the same peripheral in the future (not part of this PR):

rtc: rtc@... {
  compatible = "ti,cc13xx-cc26xx-rtc";
  ...

  timer {
    compatible = "ti,cc13xx-cc26xx-rtc-timer";
    ...
  };

  counter {
    compatible = "ti,cc13xx-cc26xx-rtc-counter";
    ...
  };

  pps {
    compatible = "ti,cc13xx-cc26xx-rtc-pps";
    ...
  };
};

Or alternatively an MFD pattern with similar requirements.

Fixing the namespacing now makes sense standalone as it reduces the
chance of custom drivers being broken in the future.

Redundant extension of the mandatory system clock devicetree node is
replaced with a single `status = "okay"` which seems to be the more
sensible default to avoid user error when defining custom boards.
Knowledgeable users can still override this if really needed.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-07-07 18:46:24 -04:00
Florian Grandel 38e2eb8fe6 soc: ti: cc13/26xx: clean up include hierarchy
Removes duplicate code and inconsistencies in the naming of the
cc13xx_cc26xx devicetree and RTC driver hierarchy and alignes it with
the actual TI product series naming hierarchy.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-07-07 18:46:24 -04:00
Nicolas Pitre 49580bd374 drivers: systick: implement option for sys_clock_cycle_get_64()
This driver, due to its limited 24-bits counter, is already tracking a
cycle count in software. Allow that count to be a 64-bits value so this
won't wrap in a matter of only a few seconds when the hardware clock
is fast.

This is very cheap to do as expensive math operations (i.e. divisions)
are performed only on counter intervals whose values fit in 32 bits like
before.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-07-01 12:04:10 +02:00
Alexander Razinkov cb491cacad drivers: support 64-bit addresses from devicetree for PLIC, MTIMER, UART
Usage of 64-bit address constants from devicetree without
an UINT64_C wrapping macro results in the following warning
and the cut-off of the address value:

"warning: integer constant is so large that it is unsigned"

This change fixes such issue for PLIC, MTIMER and UART in case
they are used with some 64-bit RISC-V platforms

Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
2023-06-25 03:29:54 -04:00
Andrey Borisovich 7595cafb02 intel_adsp: timer: implemented sys_clock_idle_exit function
Generic header for system clock allows to define a sys_clock_idle_exit
function for the clock implementation.
Implemented the function in the intel_adsp_timer to reinitialize
device driver after the idle exit state.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-06-22 06:14:57 -04:00
Andrzej Kuros a6615ac11f drivers: timer: add z_nrf_rtc_timer_exact_set
The function `z_nrf_rtc_timer_exact_set` is added to allow
setting compare channel without possible creeping of cc val.

Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
2023-06-19 08:53:06 +02:00
Nicolas Pitre df6084fec1 riscv_machine_timer: remove unused config option
This should have been removed in commit 11a2107d99 ("riscv: timer:
driver revamp").

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-06-01 04:53:19 -04:00
Roman Dobrodii defb159ab1 soc/arm/silabs: support BLE with PM in Series 2 SoCs
Using EM2 or deeper sleep states (where HF clocks are off) requires
special care if BLE radio is used, since BLE radio relies on that clock,
and its power/clock requirements need to be taken into account
On SiLabs, radio PM is implemented as part of RAIL blob, which relies
on sl_power_manager HAL service. I've implemented SoC PM
state changes using sl_power_manager instead of emlib, and added
call to RAIL PM initialization in Gecko HCI driver.

Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
2023-05-24 13:31:44 -04:00
Roman Dobrodii 549358255f drivers/timer/gecko_burtc: allow queries prior to timer initialization
Before BURTC is initialized, clock to its APB CSR file is stopped, so
any attempt to read BURTC regs results in BusFault. However,
many parts of Zephyr may call sys_clock getters even before sys_clock
driver itself is initialized. This change adds support for that:
sys_clock_elapsed() and sys_clock_cycle_get_32() simply return 0
if BURTC is not init yet.

Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
2023-05-24 13:31:44 -04:00
Carlo Caione 6f3a13d974 barriers: Move __ISB() to the new API
Remove the arch-specific ARM-centric __ISB() macro and use the new
barrier API instead.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-05-24 13:13:57 -04:00
Carlo Caione 2fa807bcd1 barriers: Move __DMB() to the new API
Remove the arch-specific ARM-centric __DMB() macro and use the new
barrier API instead.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-05-24 13:13:57 -04:00
Mahesh Mahadevan b72b99f49a drivers: timer: nxp: Conditionally compile the wakeup source
The function to enable wakeup from deep sleep modes is not
available on all SoC's. Hence compile this only when the
wakeup_source property is enabled.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-05-17 14:35:10 -05:00
Adam Wojasinski 9aa71977ee drivers: timer: nrf_rtc_timer: Align to renamed nrfx symbols
New nrfx release introduces renamed preprocesor symbols and macros
in nrf_rtc.h

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-05-05 11:47:53 +02:00
Francois Ramu 1f070c91cf drivers: timer: stm32u5 lptimer wait for ready only once
The stm32_lptim_wait_ready() is waiting for the DIEROK flag
with a while loop. It should not be repeated.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-05-03 12:40:02 +02:00
Francois Ramu 403279cc76 drivers: timer: stm32 adjust lptimer with slow LPTIM clock
Commit to adjust the next_arr with slow LPTIM clock
The next_arr must not be < 0.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-25 10:37:13 -07:00
Francois Ramu 39fab29c10 drivers: timer: stm32 lptim can divide its input clock freq
This PR will divide the LPTIM clock freq to increase the max timeout.
Only one LPTIM instance is considered for PM timer.
The input freq becomes a fraction of the internal PCLK
source (mainly LSE clock). As the tick per sec does not change,
the minimum lptim counter must always be >0.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-25 10:37:13 -07:00
Francois Ramu 23f03c8030 drivers: timer: stm32u5 lptimer waits for DIER complete
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-25 10:37:13 -07:00
Roman Dobrodii cb14d8b099 soc/arm/silabs_exx32: fix PM implementation - wake up using BURTC timer
- Add Gecko BURTC sys_clock driver to handle wake up from EM2,3 states
- Remove custom PM policy and dependency on HAL sl_power_manager service
- EM1 supported in all configurations
- EM2,3 supported only if SysTick is replaced by BURTC

Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
2023-04-21 16:24:05 +02:00
Gerard Marull-Paretas 4863c5f05b sys/util: extend usage of DIV_ROUND_UP
Many areas of Zephyr divide and round up without using the DIV_ROUND_UP
macro. Make use of it, so that we make use of a tested system macro and
at the same time we make code more readable.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 16:42:29 +02:00
Gerard Marull-Paretas a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Jamie McCrae 7924c667f3 drivers: timer: nrf_rtc_timer: Implement stop function
Implements functionality to stop the nRF RTC system timer source.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-04-11 12:02:47 +02:00
Gerard Marull-Paretas 0ebe14beb4 sys: util: migrate all files to DIV_ROUND_UP
ceiling_fraction is deprecated, use DIV_ROUND_UP.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-11 12:00:37 +02:00
Alexander Razinkov 1e9c7a9ad6 drivers: timer: added MTIMER_DIVIDER register initialization
Syntacore RISC-V platforms have dedicated MTIMER_DIVIDER register which
should be configured during the Timer initialization.

The configuration of dedicated MTIMER_DIVIDER register could now
be performed during initialization if its address is provided.

Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
2023-04-07 13:19:56 +02:00
Pieter De Gendt 6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Nicolas Pitre 16770c743e riscv: timer: avoid possible tick announcing overflow on boot
If for any reason the timer counter didn't hold a value close enough to
zero on boot then the cycle delta could overflow and the reported ticks
won't be right. Those who really want the hardware uptime where this
makes sense (as opposed to Zephyr's uptime) can still rely on
sys_clock_cycle_get_64().

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-03-30 11:22:31 -04:00
Daniel DeGrasse f3a35c58d8 drivers: timer: mcux_gpt_timer: rewrite timer to use free run mode
GPT timer driver previously used "restart mode", where the timer would
count to a given value, then rollover. In this mode,  "Any write access
to the Compare register of Channel 1 will reset the GPT counter". Since
a write to the compare register takes affect after 1 cycle of the
module's bus clock, and the bus clock is not synchonized with the GPT
module's low frequency counter clock, writing to the compare register
will induce a counter reset, and can cause the GPT to lose time
synchronization. This can induce time drift over time.

To fix this, rework the GPT driver to use "free run" mode. Note that
free run mode is not used directly, rather the GPT is configured to
reset on a tick boundary at boot, and then the second compare register
is used to set capture points. This way, the GPT interrupt will always
fire at a tick boundary, and no calculations are needed to handle
the counter rollover.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-30 09:51:04 +02:00
Henrik Brix Andersen c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Nicolas Pitre a6809ef93a timer: hpet: a few improvements
- That MIN_DELAY is a magic arbitrary number that is never going to be
  right for all cases. Get rid of it in favor of a smarter solution.

- `sys_clock_set_timeout()` should not base its next match value on the
  current time. Tracking the `last_tick` and `last_elapsed` values avoids
  the need for all the tick rounding computation.

- Clamp the next timeout to HPET_MAX_TICKS/2. This leaves room for the
  added elapsed time and any possible IRQ servicing delay.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-03-28 07:26:08 -04:00
Krzysztof Chruscinski e0082eded7 drivers: timer: nrf_rtc_timer: Add guard against conflict
Add missing guard which prevents use of nrf_rtc_timer on
the same RTC instance (RTC1) as counter driver instance.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2023-03-27 22:15:15 +00:00
Krzysztof Chruscinski 9a73b9c80d hal_nordic: Change scheme for RTC and TIMER reservation
In general, RTC and TIMER driver implements counter API but there
are exception when those peripherals are used in a custom way
(e.g. for system timer or bluetooth). In that case, system must
prevent using counter based on a reserved instance. Previously,
it was managed by Kconfig options but that cannot be maintained
when switching to devicetree configuration of the counter driver.

A new approach removes Kconfig options and instead adds static
asserts in the files which are using direct peripherals. Those
asserts check if given node is not enabled in the device tree.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2023-03-20 16:59:40 +01:00
Sylvio Alves 4701581776 drivers: timer: esp32c3: fix dtick counter increment
System uptime is not getting incremented when TICKLESS_KERNEL is enabled.

This fixes it by changing the clock_annouce and updating
last_count increment accordingly.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-03-09 17:22:34 +01:00
Giancarlo Stasi 654d2176d7 drivers: nrf_rtc_timer: force init of interrupt and event enabling
Make sure that the interrupt and event routing enable bits have the
reset values in case the Zephyr firmware image is chain-loaded.
When started by MCUboot, these registers values aren't the reset values,
but then Zephyr initializes them in same way. Yet, when the Zephyr
firmware image is chain-loaded by nRF5 bootloader, they may have values
that cause the scheduler to behave in unexpected ways.

Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
2023-03-06 12:34:08 +01:00
Nicolas Pitre 0fc9c9f46a drivers/timer/arm_arch_timer: driver revamp
Couple issues:

- `sys_clock_set_timeout()` should not base its `mtime` on the current
  time either. Tracking the `last_tick` and `last_elapsed` values avoids
  the need for all the tick rounding computation.

- The MIN_DELAY thing is pointless. The hardware performs a signed
  comparison. If the delay gets close or even behind current time then
  the IRQ will be triggered right away. This is unlikely to happen very
  often anyway so the constant overhead is uncalled for.

- Runtime 64-bits divisions on 32-bits hardware are very expensive.

- The timer must be enabled before the count can return a sensible
  value during driver init (at least on qemu_cortex_a9).

Discussion in PR #54919 applies here too.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-03-02 15:37:35 -05:00
Julien D'Ascenzio 704ca8f1b4 drivers: timer: stm32_lptim: fix sys_clock_* return value
This commit finish to fix the bug describe by 85e2a0679a68f02f7ef.
With the previous correction, the uptime read could be in the past:
if the counter rewinds just after testing ARRM flag, we had lost
some counts.

Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
2023-02-27 17:31:03 +01:00
Nicolas Pitre 11a2107d99 riscv: timer: driver revamp
Several issues:

- `last_count` should not be updated with current time or this will
  cause a time drift and induce jitter due to IRQ servicing latency.

- `sys_clock_set_timeout()` should not base its `mtime` on the current
  time either. Tracking the `last_tick` and `last_elapsed` values avoids
  the need for all the tick rounding computation.

- The MIN_DELAY thing is pointless. If the delay gets close or even behind
  current time then the IRQ will be triggered right away. This is unlikely
  to happen very often anyway so the constant overhead is uncalled for.

- Runtime 64-bits divisions on 32-bits hardware are very expensive.

Fix the above, and improve the following:

- Prime the accounting by simply invoking the IRQ handler from the init
  code. That will make the "ticks since boot" counter right.

- Remove excessive casts, especially a few wrong ones.

- Simplify the code overall.

Here's the output from the timer_jitter_drift test.

Before this patch:

|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
|  expected: 1000 us,            60000.000000 cycles
|  min:      907.600000 us,      54456 cycles
|  max:      1099.750000 us,     65985 cycles
|  mean:     1008.594633 us,     60515.678000 cycles
|  variance: 2.184205 us,        7863.136316 cycles
|  stddev:   1.477906 us,        88.674332 cycles
|timer start cycle 995589, end cycle 606152369,
|total time 10085946.333333 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 85946.333333 us

After this patch:

|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
|  expected: 1000 us,            60000.000000 cycles
|  min:      992.116667 us,      59527 cycles
|  max:      1030.366667 us,     61822 cycles
|  mean:     1000.001902 us,     60000.114100 cycles
|  variance: 0.105334 us,        379.201081 cycles
|  stddev:   0.324551 us,        19.473087 cycles
|timer start cycle 987431, end cycle 600988572,
|total time 10000019.016667 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 19.016667 us

The mean, variance and standard deviation number differences speak for
themselves, even in the absence of competing ISRs and/or IRQ-disabled
periods which would have made the comparison even worse.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-02-21 18:04:55 -05:00
Khor Swee Aun c93c853cba drivers: timer: Machine timer driver enablement for NIOSV
Update machine timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on NIOSV devicetree.

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-02-20 09:29:13 -05:00
Zachary J. Fields c29dcb3a98 cortex-m: warnings: Address -Wextra warnings
`#defines` do NOT sepecify a type. They will either adopt a native
system type or type of the value that was passed into the expression.
This can lead to warnings such as, "warning: comparison of integer
expressions of different signedness: 'uint32_t' {aka 'unsigned int'}
and 'int' [-Wsign-compare]".

By casting expressions, such as `MAX_TICKS` to `k_ticks_t`, we can
force the appropriate types and resolve these warnings.

Signed-off-by: Zachary J. Fields <zachary_fields@yahoo.com>
2023-02-19 20:58:44 -05:00
Andrzej Głąbek 31c11a5dc0 drivers: nrf_rtc_timer: Fix handling of COMPARE events in set_alarm()
This is a follow-up to commits cf871aec64
and 205e684958.

It turns out that the current implementation of the nrf_rtc_timer may
still fail to properly handle a timeout if that timeout is set in very
specific conditions - when a previously set timeout is about to expire.
When that happens, the new timeout is handled 512 seconds later (when
the system timer overflows) than it should be.

A recently added nrf_rtc_timer test case (test_tight_rescheduling)
exposes this problem and this commit fixes it by adding examination
of COMPARE events that appear during setting of the CC register value
for a given timeout.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-02-14 08:28:28 +01:00
Andrzej Głąbek d6ba49e298 drivers: nrf_rtc_timer: Rename set_absolute_alarm() to set_alarm()
This function name is misleading as the absolute time values handled
by the driver are 64-bit and this function receives a 32-bit parameter,
which is supposed to be a CC register value, not the target time.
Correct the name of this function and its parameter, and remove a now
unnecessary masking from its body.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-02-14 08:28:28 +01:00
Francois Ramu df4fa7088d drivers: timer: stm32u5 lptimer waits for DIER complete
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
This is done with a function call for better readability.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-02-09 13:17:03 +01:00