Fixes the routing of the events associated with a secondary
i2c target address being routed to the primary config. The
i2c_target_config/slave_cfg was being selected from the
driver address match but then over written by the primary.
This change fully implements the if/else of 10bit addressing
and includes a assert if the slave_cfg is NULL, and explains
why dual 10bit addresses on STM32 won't work.
Signed-off-by: Tim Woolliscroft <tim@opteran.com>
Do not enable subsystem/driver shell modules by default and stop abusing
CONFIG_SHELL_MINIMAL, which is internal to the shell subsystem, to decide
when to enable a driver shell.
The list of shell modules has grown considerably through the
years. Enabling CONFIG_SHELL for doing e.g. an interactive debug session
leads to a large number of shell modules also being enabled unless
explicitly disabled, which again leads to non-negligible increases in
RAM/ROM usage.
This commit attempts to establish a policy of subsystem/driver shell
modules being disabled by default, requiring the user/application to
explicitly enable only those needed.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use GPIO_OUTPUT_INACTIVE to initialize the pin so that the ACTIVE_LOW DT
flag is honored and use the gpio_pin_set_dt functions to set the
(logical) value of the pin instead of gpio_pin_configure_dt, that
tries to reconfigure the pin each time.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
We need to do a build assert for the fifo enable status of 'I2C2'.
There is a problem with using instance to obtain property when
any one I2C port is not enabled.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add drivers for gpio_i2c_switch which is present in beagleconnect freedom
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
Add a property for I2C channel switch selection. This property will
write to the SMBxxCHS register according to the I2C node you selected,
which can make channel swapping.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The ISR for CQ mode was unconditionally writing into the I2C message
buffer for all transfer types. The correct data was transferred on the
I2C interface, but the clobber caused CONFIG_I2C_LOG_LEVEL_DBG to
display incorrect data for I2C writes.
This change will also help performance of large I2C write transactions.
Signed-off-by: Keith Short <keithshort@google.com>
Move the syscall_handler.h header, used internally only to a dedicated
internal folder that should not be used outside of Zephyr.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add the get_config API to the stm32 I2C driver.
It will return the value of the Clock Control register for i2C V1 bus
or the TIMING register for the I2C V2 bus.
This is hold by a i2c_config_timing structure of the device data
Add a bool to check if the I2C is configured or not.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Let the caller decide what should be done in case of the transfer failure.
It will reduce the number of error log prints when the i2c scan is
called for the bus where nothing is connected.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
In driver runtime configuration function, calling
calling pm_device_runtime_get/put() will have the effect of performing
pinctrl change from sleep to default and back from default to sleep
which is useless and in turn enables and disables GPIO clocks two times.
Stop this crazyness and purely enable/disable clock, which might be
superfluous in some cases but which remains much more reasonable than
than the previous implementation.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
pm_device_runtime_enable() will call i2c_stm32_suspend() if
pm_device_init_suspended() isn't called.
Since the aim is to perform suspension, just need to call
pm_device_runtime_enable().
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
During i2c_configure API execution, there is no way core
can go in low power mode. Hence, call to pm_device_busy_set/get API
is useless.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
i2c_rcar.c includes soc.h header which doesn't need for this source
and exists not for all boards. soc.h header doesn't exist for rcar-gen3
soc based on arm64 core.
soc.h consists soc-depended defenitions and need to be included
by soc-depended sources.
Signed-off-by: Dmytro Semenets <dmytro_semenets@epam.com>
Fixes an issue that reload mode is not disabled in case of an error.
From this case the driver could not recover because in msg_init()
no new transfer could be initialized.
Signed-off-by: Mario Jaun <mario.jaun@gmail.com>
Different nRF52 devices have different maximum TWI DMA transfer size,
and it's easy to hit the limit with i2c displays on nrf52832 (8 bit) and
nrf52810 (10 bit). Currently neither the driver or the hal validate the
limit, leading to random NACK errors when trying to transfer more data.
Add a check on the driver to fail gracefully when going over the limit.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
I2C scan might fail as peripheral is still busy completing last
operation. This makes sure transfer call waits for free line.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
When slave_address is 10 bits, data type should be
uint16_t instead of uint8_t,
like the data typeof data->slave_cfg->address.
https://github.com/zephyrproject-rtos/zephyr/issues/55987
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The i2c_ll_stm32_v2 driver requires manual timing configuration for
"fast mode plus" speed.
This adds an error message linking to the appropriate documentation.
Signed-off-by: Jonas Otto <jonas@jonasotto.com>
Enabled intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS I2C to transfer and
receive data.
Signed-off-by: Bindu S <bindu.s@intel.com>
Remove unwanted "pm_device_runtime_get" lock which makes i2c power
management working incorrectly.
Fixes: #62790
Signed-off-by: Petr Hlineny <development@hlineny.cz>
Drivers for nRF SoCs using pinctrl did not select PINCTRL. This means
boards are forced to enable PINCTRL.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Reset the device on initializing if reset-node is available in dts.
`snps,desingware-i2c` does not define reset-node itself.
Add more of an element that inherits `reset-device.yaml` to
the `compatible` section to allow defining the reset-node
for using this feature.
For example.
```
compatible = "reset-device-inherit-node", "snps,designware-i2c";
```
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Introduce I2C target transfer using the PIO mode. Add an option
"target-pio-mode" in the yaml file, determined by the DTS, to dictate
whether I2C target transfer uses the PIO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Disable the timeout setting when both the clock and data are
in a low state. This allows for I2C host clock stretching
without a timeout limit.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
IT8XXX2_I2C_STR is a register of read-only, non-writable to clear.
Here we can set hardware reset bit in the IT8XXX2_I2C_CTR register
to clear the status of IT8XXX2_I2C_STR.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit adds option to dump i2c messages of only specified
devices. It makes it easier to debug communication of specific
i2c device instead of logging all i2c communication.
The filter of devices is specifiec in device-tree using the
node with "zephyr,i2c-dump-filter" compatible string.
Example of device-tree node:
i2c-dump-filter {
compatible = "zephyr,i2c-dump-filter";
devices = < &display0 >, < &sensor3 >;
};
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit changes the format of printed messages to align the
following strings and make it more readable.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit changes the parameter of i2c_dump_msgs function from
string name to pointer to the device structure.
It allows for comparison of device pointers and allow to use
the printed device name in i2c shell commands.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
To be consistent with other xmc4xxx drivers.
A few other device tree changes:
- Rename clock signal option as it's handled by DX1.
- Remove clock-frequency option as it's already added in
i2c-controller.yaml, and interrupts is already defined as array
in base.yaml.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Currently the driver is not configured as controller during initialization.
Any use of I2C in controller mode without an explicit i2c_configure() will
not work.
In this commit the driver is automatically configured.
But, delay the configuraition until first use instead of during init
because otherwise tests/drivers/i2c/i2c_target_api hangs without any
errors on xmc47_relax_kit (when internal pulls are used). This issue
needs to be investigated.
There are a few other fixes/cleanups:
- Change the default master_frequency from XMC4_I2C_SPEED_STANDARD to
I2C_SPEED_STANDARD.
- Use devicetree clock frequency for target configuration instead of
I2C_SPEED_STANDARD.
- Rename master_frequency to bitrate as it's also used by the target
configuration now.
- Remove several uneeded casts.
- Forward backup config in get_config().
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The simple executor was removed with the usage of the spsc queue but
some stray references remained. Remove those.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds a new I2C shim driver for Intel SoCs. Builds upon the SEDI bare
metal I2C driver in the hal-intel module.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
Sometimes, channel C may write wrong register to the target device.
This issue occurs when FIFO2 is enabled on channel C. The problem
arises because FIFO2 is shared between channel B and channel C.
FIFO2 will be disabled when data access is completed, at which point
FIFO2 is set to the default configuration for channel B.
The byte counter of FIFO2 may be affected by channel B. There is a
chance that channel C may encounter wrong register being written due
to the FIFO2 byte counter wrong write after channel B's write operation.
The current workaround is that channel C cannot use FIFO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Update to shim driver compatible with the hardware block
in S32K344. Configure the pins before initializing I2C
to avoid happening bus busy.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
