Commit graph

94562 commits

Author SHA1 Message Date
Arunmani Alagarsamy 78150c8e1b boards: silabs: Add I2C node
Add i2c pincntrl to silabs boards that supports pinctrl api.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
2024-04-25 18:07:48 -04:00
Arunmani Alagarsamy 0810180135 drivers: i2c: i2c_gecko: Refactor driver to use pinctrl api
Deprecate the use of location_* properties in the i2c_gecko driver
and migrate to the pinctrl api for enhanced maintainability and
compliance with current standards.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
2024-04-25 18:07:48 -04:00
Arunmani Alagarsamy 04931a54ee drivers: pinctrl: pinctrl_gecko: Add support for using pinctrl api
This update integrates I2C support with the pinctrl_configure_pins api
within the pinctrl_gecko driver.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@capgemini.com>
2024-04-25 18:07:48 -04:00
Dominik Ermel 919baf84d6 samples: fs: fat_fs: RAM disk in SRAM region for nrf52840dk
Add overlay, for nrf52840dk, that reserves RAM in internal
SRAM using the DTS definition.
The sample with such region can be built with the config
file nrf52840dk_nrf52840_ram_disk_region.conf, but, instead
of automatically allocating memory, the Disk driver will
use the pre-defined region provided by the DTS overlay.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2024-04-25 18:07:16 -04:00
Dominik Ermel d5e321516a samples: fs: fat_fs: Add RAM disk sample for nrf52840dk
Add configuration for nrf52840dk that allows to create RAM
disk; this configuration does not reserve special region
in RAM using DTS but uses automatic buffer allocation, by RAM
Disk Drivers, according to RAM disk specification in DTS.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2024-04-25 18:07:16 -04:00
Myeonghyeon Park 63692c1349 board: raspberrypi: enable serial communication on Raspberry Pi 5
Enable serial communication through UART port between HDMI ports.

Signed-off-by: Myeonghyeon Park <myeonghyeon@tsnlab.com>
Signed-off-by: Junho Lee <junho@tsnlab.com>
2024-04-25 18:06:43 -04:00
Junho Lee 73f4102ad8 board: raspberrypi: add support for Raspberry Pi 5
Add support for Raspberry Pi 5.
Currently only internal GPIO(gio_aon) is supported.
'Blinky' is the only sample that is working for now.

Signed-off-by: Junho Lee <junho@tsnlab.com>
2024-04-25 18:06:43 -04:00
Junho Lee 76ec481794 soc: brcm: add support for BCM2712
Add support for BCM2712, SoC of Raspberry Pi 5.

Signed-off-by: Junho Lee <junho@tsnlab.com>
2024-04-25 18:06:43 -04:00
Junho Lee 31baddaa51 drivers: gpio: add brcmstb gpio driver
Add GPIO driver for brcmstb, required by Raspberry Pi 5.

Signed-off-by: Junho Lee <junho@tsnlab.com>
2024-04-25 18:06:43 -04:00
Hang Fan 247ac7fce9 Bluetooth: Classic: Add SDP records for HFP
Add SDP records for HFP Hands-Free

Signed-off-by: Hang Fan <fanhang8@gmail.com>
2024-04-25 18:05:40 -04:00
Daniel Baluta 3948a5e8f9 doc: board_porting: Add Cadence HIFI4 core to documentation
This enhances the description of i.MX8MPlus SoC with the Cadence HIFI4
core and thus will make this example more relevant to the benefits of
HWMv2.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2024-04-25 18:01:36 -04:00
Jamie McCrae d12301f9ae west.yml: MCUboot synchronization from upstream
Update Zephyr fork of MCUboot to revision:
  78bfe750cde0f8dfcf81bb4c0a68243d45906def

Brings following Zephyr relevant fixes:
  - 73315f7b bootutil: Fix memory leak in HKDF implementation
  - 453096b1 zephyr: arm: Update reading the flash image reset
    vector
  - 14961292 boot: zephyr: Add optional MCUboot boot banner
  - 7174dd2b boot: zephyr: boards: actinius: enable multithreading
    in config
  - 556b32a6 boot: Removed unnecessary if-statement
  - da2e2ab4 boot: Enforce TLV entries to be protected
  - ea1cdfde boot: Add tlv query for protected region
  - 8c0e36c8 boot: zephyr: esp32: rename boards to meet hwmv2
  - f06bc711 bootutil/crypto: Builtin ECDSA key support for PSA
    Crypto backend
  - e369784b bootutil: Allow the usage of builtin keys in
    verification
  - c5a528ba New OVERWRITE_ONLY_KEEP_BACKUP option

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-04-25 18:00:53 -04:00
Joakim Andersson 855c0d742b drivers: spi: Align SPI init priority with other devices
Align the SPI init priority with other devices.
Other bus-devices like UART and I2C are init at standard kernel
device level (50), but SPI is at 70 and there appears to not be
a reason for it.
GPIO is init at 40 so there should not be an issue to use the default.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2024-04-25 18:00:20 -04:00
Fabio Baltieri a466fb05d0 doc: services: pm: mention the pm shell option
Add a paragraph about the CONFIG_PM_DEVICE_SHELL option and how to use
it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-04-25 18:00:05 -04:00
Fabio Baltieri c5003e0eb1 pm: add device shell commands
Add support for a "pm" shell command to trigger suspend/resume as well
as runtime-get/put on devices. This is useful for testing during driver
development.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-04-25 18:00:05 -04:00
Nikodem Kastelik 82db5d3adb boards: nordic: nrf54h20: add PWM to supported features
PWM is now supported on nRF54H20 board.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-04-25 17:59:27 -04:00
Nikodem Kastelik 539a428032 tests: drivers: pwm: boards: nrf54h20dk: add memory-region property
This property will ensure that PWM driver allocates data buffer
in appropriate location.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-04-25 17:59:27 -04:00
Nikodem Kastelik e0b98dccd1 drivers: pwm: pwm_nrfx: place data buffer in specified memory region
Some devices (like nRF54H20) must have PWM data buffer
stored in appropriate location.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-04-25 17:59:27 -04:00
Nikodem Kastelik a6f57fae0b dts: bindings: pwm: nordic: add memory-region support
This property will allow PWM driver allocate data buffer
in appropriate memory region.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2024-04-25 17:59:27 -04:00
Phi Bang Nguyen de29ffb033 drivers: video_common: Add aligned allocation API
For some hardwares, it is very common that some aligment on the allocated
memory is required. For example, the PxP and eLCDIF of NXP require aligned
buffers so that their performances can be optimal.

Add a new video_buffer_aligned_alloc() API for these needs.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2024-04-25 17:58:57 -04:00
Sebastian Bøe 99f94295eb drivers: nrf: rram: Support TF-M
Non-secure images cannot reference NRF_RRAMC_NS because NRF_RRAMC_NS
does not exist.

TF-M will configure RRAMC according to these Kconfig's before booting
the non-secure image so we ifdef out this code.

Also, rewrite the implementation of commit_changes to also work when
the commit task is not available.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2024-04-25 17:58:40 -04:00
Flavio Ceolin ec83ab333d pm: policy: Fix event integer overflow
In the follow expression:

cyc_evt += UINT32_MAX + 1U

first it is evaluated (UINT32_MAX + 1U), since both types
interpreted as uint32_t, this operation causes an overflow resulting
in 0U.Then we have

cyc_evt = (uint64_t)cyc_evt + 0U

Fix it casting of the operands in the first operation to uint64_t.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-04-25 17:58:04 -04:00
Anas Nashif 23d08590dd tests: sbs_charger: fix filter
Use platform key for filtering to avoid cmake issues with unsupported
platforms.

Fixes #71870

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-04-25 17:57:30 -04:00
Mohamed ElShahawi 7084662cc8 kernel: system_work_q: Mark queue thread as essential
Marking sysworkq as essential, so when it fails, the system will halt
instead of continuously working, and dependent components stay
in a broken state.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2024-04-25 21:40:24 +02:00
Mohamed ElShahawi 9ba4653243 kernel: work_queue: make thread essential flag configurable
Allow the creator of a work_queue instance to choose whether
the work_queue thread should be marked as ESSENTIAL or not.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2024-04-25 21:40:24 +02:00
Jerzy Kasenberg 2765d23775 manifest: hal_renesas: update module
Update hal_renesas to include sleep code

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-04-25 16:17:53 +02:00
Jerzy Kasenberg 1d83fa521c drivers: regulator: Add power management to DCDC
This change restore DCDC configuration after system resumes.

When CONFIG_PM_DEVICE is enabled each of the four rails that
support DCDC handle resume in regulator_da1469x_pm_action function.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-04-25 16:17:53 +02:00
Andrzej Kaczmarek 422092f2d3 drivers: gpio: smartbond: Add GPIO latching for PM
This adds automatic GPIO latching before going to extended sleep and
restoring state after wakeup.

Mode and state for each pin is stored, then ports are latched to retain
state when PD_COM is disabled during sleep. On wakeup mode and state for
each pin is restored and ports are unlatched to make it work again.

Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-04-25 16:17:53 +02:00
Andrzej Kaczmarek 80c5f72fe2 soc: arm: smartbond: Enable cache retainability in sleep
This enables cache retainability while in sleep so there's no penalty
when executing from QSPI after wakeup.

Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
2024-04-25 16:17:53 +02:00
Andrzej Kaczmarek fbc7a9e209 soc: arm: smartbond: Add support for extended sleep
This enabled extended sleep for Renesas SmartBond(tm).

Extended sleep is low power mode where ARM core is powered off and can
be woken up by PDC. This is default sleep mode when CONFIG_PM is
enabled.

Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-04-25 16:17:53 +02:00
Andrzej Kaczmarek 8ccc345c6e soc: arm: smartbond: Always select PLATFORM_SPECIFIC_INIT
Platform specific init is needed once power management is introduced.

Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
2024-04-25 16:17:53 +02:00
Andrzej Kaczmarek 6307d8de78 drivers: timer: Add timer driver to Renesas SmartBond(tm)
This adds timer driver for Renesas SmartBond(tm) family.
It uses TIMER2 block which is in PD_TIM power domain so it can work even
if ARM core is disabled, thus can work as a sleep timer.

Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2024-04-25 16:17:53 +02:00
Jordan Yates 3247a1db81 modules: mbedtls: option for MBEDTLS_HKDF_C
Add kconfig option to enabled `MBEDTLS_HKDF_C`, HMAC-based
Extract-and-Expand Key Derivation Function.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2024-04-25 09:46:52 -04:00
Mateusz Holenko 6784ed8202 boards: nxp: Add compatible for RD_RW612_BGA
Add `compatible` entry for the rd_rw612_bga target.

Signed-off-by: Mateusz Hołenko <mholenko@antmicro.com>
2024-04-25 09:46:39 -04:00
Grzegorz Swiderski a0df4272ac dts: broadcom: Move viper-common.dtsi to dts/common
Squash the two copies of this file found in `dts/arm` and `dts/arm64`.
Their contents were identical up to devicetree property ordering.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-04-25 09:46:25 -04:00
Grzegorz Swiderski 3ddfa67655 dts: broadcom: Remove old copy of viper-a72.dtsi
This file was moved to the `dts/arm64` directory 3 years ago:
3539c2fbb3

However, the original file in `dts/arm` was left by mistake. Since then,
it's been unused and seldom updated, but it hasn't diverged much.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-04-25 09:46:25 -04:00
Håvard Reierstad f597e7d2a9 doc: Bluetooth: Mesh: Remove experimental DFU statement
Removes statement saying the implementation for Mesh DFU is
experimental.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2024-04-25 09:45:51 -04:00
Joel Guittet d9e5aa46b6 samples: display: lvgl: add esp32-s3-touch-lcd-1.28 config
Add configuration for the Waveshare ESP32-S3-Touch-LCD-1.28 board.

Signed-off-by: Joel Guittet <joelguittet@gmail.com>
2024-04-25 15:12:35 +02:00
Joel Guittet 277c558e47 samples: drivers: adc: add esp32-s3-touch-lcd-1.28 overlay
Add configuration for the Waveshare ESP32-S3-Touch-LCD-1.28 board.

Signed-off-by: Joel Guittet <joelguittet@gmail.com>
2024-04-25 15:12:35 +02:00
Joel Guittet 6d91c528a0 boards: xtensa: add support for waveshare esp32-s3-touch-lcd-1.28
Add support for the Waveshare ESP32-S3-Touch-LCD-1.28 board, including
support the LCD and touchscreen controllers. Tested with samples
already available.

Signed-off-by: Joel Guittet <joelguittet@gmail.com>
2024-04-25 15:12:35 +02:00
Caspar Friedrich 666a89221b drivers: adc: tla2021: Fix reference voltage
This fixes the problem that `adc_raw_to_millivolts` only returns half of
the actual voltage.

Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
2024-04-25 15:12:14 +02:00
Andy Ross 02b24911f7 kernel/sched: Fix lockless ordering in halt_thread()
We've had threads spinning on the thread state bits, but weren't being
careful to ensure that those bits were the last things seen to change
in a halting thread.  Move it to the end, and add a barrier for
correctness.

Signed-off-by: Andy Ross <andyross@google.com>
2024-04-25 15:12:02 +02:00
Andy Ross 20611f13ca sched: Optimize dummy thread usage on SMP
Nicolas Pitre points out that since these thread structs are just
dummies for the context swtiching, they can be presumed to be "write
only" and thus there's no point in having one per CPU, everyone can
share the same one.

The only gotcha is that we never really documented (nor really have a
place to document) that rule, so it's not theoretically impossible for
an architecture to read back what it might have written underneath
arch_switch().  Leave this in a separate commit for bisection
purposes, but the risk seems very low.

Signed-off-by: Andy Ross <andyross@google.com>
2024-04-25 15:12:02 +02:00
Peter Mitsis 9f4d9989c6 tests: thread abort deadlock scenario
Adds a test to verify that a series of k_thread_abort() issued from
ISRs do not cause a deadlock.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2024-04-25 15:12:02 +02:00
Andy Ross 3ef282be6c tests/kernel/threads: Augment abort_from_isr test to detect FMW
There's a easily-tripped-upon free memory write condition in the arch
layers where they will write to a cached _current pointer after that
thread has been aborted.  Detect this by clobbering the thread data
after the return from k_thread_abort() and validating that it's still
clear after the ISR returns.

Note that the clobbering of the thread struct requires the removal of
a k_thread_join() that (obviously) requires that it see a DEAD flag
set.  Joining aborted threads isn't actually legal, but does still
work as long as app code doesn't reuse the memory.  Basically we can't
test both cases here, and we have join coverage elsewhere already.

Signed-off-by: Andy Ross <andyross@google.com>
2024-04-25 15:12:02 +02:00
Andy Ross 61c70626a5 kernel/sched: Fix free-memory write when ISRs abort _current
After a k_thread_abort(), the resulting thread struct is documented as
unused/free memory that may be re-used (for example, to respawn a new
thread).

But in the special case of aborting the current thread from within an
ISR, that wasn't quite happening.  The scheduler cleanup would
complete, but the architecture layer would still try to context switch
away from the aborted thread on exit, and that can include writes to
the now-reused thread struct!  The specifics will depend on
architecture (some do a full context save on entry, most don't), but
in the case of USE_SWITCH=y it will at the very least write the
switch_handle field.

Fix this simply, with a per-cpu "switch dummy" thread struct for use
as a target for context switches like this.  There is some non-trivial
memory cost to that; thread structs on many architectures are large.

Pleasingly, this also addresses a known deadlock on SMP: because the
"spin in ISR" step now happens as the very last stage of
k_thread_abort() handling, the existing scheduler lock works to
serialize calls such that it's impossible for a cycle of threads to
independently decide to spin on each other: at least one will see
itself as "already aborting" and break the cycle.

Fixes #64646

Signed-off-by: Andy Ross <andyross@google.com>
2024-04-25 15:12:02 +02:00
Andy Ross 93dc7e7438 kernel/spinlock: Fix SPIN_VALIDATE in ISRs
Spinlocks taken in ISRs were storing the _current thread pointer of
the interrupted thread as the owner, which was never strictly correct
but was benign as the thread would never run until the lock was
released.

But now k_thread_abort(_current) in an ISR has been fixed to eliminate
all references to the (now aborted) thread struct, and _current points
to a dummy thread.  Handle that edge case in the validation framework.

Signed-off-by: Andy Ross <andyross@google.com>
2024-04-25 15:12:02 +02:00
Andy Ross 9b43fed10a tests/kernel: Bump kobj thread bitmask size for a few tests
A scheduler fix for free memory usage on aborted threads is now using
a per-CPU dummy thread instead of a single stack-based one at startup.
These static thread objects need spots in the kobj bitmasks, and a few
tests are sitting right at the default limit (16 threads).

Signed-off-by: Andy Ross <andyross@google.com>
2024-04-25 15:12:02 +02:00
Andy Ross 5fa2b6f377 kernel/sched: Refeactor/cleanup z_thread_halt()
Big change is to factor out a thread_halt_spin() utility to manage the
core complexity of this code: the situation where an ISR is asked to
abort a thread already running on another SMP CPU.

With that gone, things can be cleaned up quite a bit.  Remove early
returns, most of the "#if CONFIG_SMP" usage was superfluous and will
optimize out, unify and clean up the comments, etc...

No behavioral changes (hopefully), just refactoring.

Signed-off-by: Andy Ross <andyross@google.com>
2024-04-25 15:12:02 +02:00
Aleksander Wasaznik 2a7adae6c1 Bluetooth: Rename num_complete_pool -> sync_evt_pool
Refactor only. The surrounding ifdefs are intentionally not changed in
this patch. They will be in the near future.

Rename the pool and generalize the documentation to allow using this
pool for other events that fit the same criteria. This pool can be used
for any buffer that is processed synchronously, without negatively
affecting 'num complete' messages. E.g. 'cmd complete/status' can be put
in this pool already.

We will be working towards making the host process all event buffers
synchronously. This is because events have no dedicated flow control,
and discarding events in the driver without informing the host creates
problems. Discarding should instead happen in the host higher layers
when unavoidable.

Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2024-04-25 15:10:50 +02:00