zephyr/soc
Ulf Magnusson def1f0e2d5 devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions
The SRAM address and size are currently available as both
DT_SRAM_{BASE_ADDRESS,SIZE} and as CONFIG_SRAM_{BASE_ADDRESS,SIZE} (via
the Kconfig preprocessor).

Use the CONFIG_SRAM_* versions everywhere, and remove generation of the
DT_SRAM_* versions from gen_defines.py.

The Kconfig symbols currently depend on 'ARC || ARM || NIOS2 || X86'.
Not sure why, so I removed it.

It looks like no configuration files set CONFIG_SRAM_* at the moment, so
another option might be to use the DT_* symbols everywhere instead. Some
Kconfig.defconfig.series files add defaults to them though.

Also improve the help texts for CONFIG_SRAM_* to say that they normally
come from devicetree rather than configuration files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-07 17:19:36 +01:00
..
arc global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
arm soc: arm: xilinx_zynqmp: Refactor for multi-arch support. 2020-01-07 17:17:12 +01:00
nios2 global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
posix kernel: rename z_arch_ to arch_ 2019-11-07 15:21:46 -08:00
riscv devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions 2020-01-07 17:19:36 +01:00
x86 soc: x86: apollo_lake: Turn .rst doc into .txt 2019-12-06 16:56:24 +01:00
xtensa devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions 2020-01-07 17:19:36 +01:00
Kconfig riscv32: rename to riscv 2019-08-02 13:54:48 -07:00