zephyr/soc/riscv
Tim Lin 8a779fc706 ITE: drivers/i2c/target: Introduce I2C target transfer using PIO mode
Introduce I2C target transfer using the PIO mode. Add an option
"target-pio-mode" in the yaml file, determined by the DTS, to dictate
whether I2C target transfer uses the PIO mode.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-09-07 09:43:06 +02:00
..
espressif_esp32 soc: espressif: adjust memory organization on linker 2023-08-31 14:08:41 +02:00
litex-vexriscv soc: riscv: Add ability to use custom sys_io functions 2023-07-26 09:43:59 +02:00
openisa_rv32m1 include/zephyr: Fix linker scripts to define _end after all static RAM data 2023-06-28 08:41:02 +00:00
riscv-ite ITE: drivers/i2c/target: Introduce I2C target transfer using PIO mode 2023-09-07 09:43:06 +02:00
riscv-privileged soc: riscv: telink_b91: add missing init.h, devicetree.h 2023-08-30 11:51:57 +02:00
CMakeLists.txt riscv32: rename to riscv 2019-08-02 13:54:48 -07:00