Aleksandar Cecaric 0144ed6b63 arch: riscv: update coredump for 64BIT RISCV ... Add RISCV 64bit registers and parse them in coredump script. Signed-off-by: Aleksandar Cecaric <aleksandar.cecaric@nextsilicon.com>		2024-04-13 07:03:23 -04:00
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core	arch: riscv: update coredump for 64BIT RISCV	2024-04-13 07:03:23 -04:00
include	arch: smp: make flush_fpu_ipi a common, optional interfaces	2024-01-09 10:00:17 +01:00
CMakeLists.txt	riscv: syscalls: use zephyr_syscall_header	2023-06-17 07:57:45 -04:00
Kconfig	arch/riscv: remove the Kconfig.core file	2024-04-05 16:46:01 +03:00
Kconfig.isa	riscv: Introduce BitManip extensions	2022-08-29 16:57:18 +02:00