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zephyr/arch/xtensa/core
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Daniel Leung 545cf8cd2f xtensa: print THREADPTR when dumping stack 
Print THREADPTR when dumping stack just like other registers.
There is no need to guard that behind CONFIG_USERSPACE.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-02-01 13:09:53 -06:00
..
offsets xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
startup xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
CMakeLists.txt xtensa: rename xtensa_asm2.c to vector_handlers.c 2023-12-13 09:41:24 +01:00
coredump.c xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
cpu_idle.c arch/xtensa: clean up arch_cpu_idle function 2023-11-20 11:14:41 +01:00
crt1.S xtensa: mmu: Simplify initialization 2023-11-21 15:49:48 +01:00
debug_helpers_asm.S xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
elf.c llext: merge llext_mem and llext_section enums 2023-12-14 19:06:55 +00:00
fatal.c arch: guard more code with CONFIG_EXCEPTION_DEBUG 2023-12-14 09:32:27 +01:00
gdbstub.c xtensa: rename z_xtensa_irq to simple xtensa_irq 2023-12-13 09:41:24 +01:00
gen_zsr.py xtensa: mmu: allocate scratch registers for MMU 2023-11-21 15:49:48 +01:00
irq_manage.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
irq_offload.c include: add missing zephyr/irq.h include 2022-10-17 22:57:39 +09:00
mem_manage.c kernel: mm: move kernel mm functions under kernel includes 2023-11-20 09:19:14 +01:00
mmu.c xtensa: mmu: Fix mmu initialization 2024-01-11 10:05:22 +01:00
ptables.c xtensa: mmu: invalidate mem domain TLBs during page table swap 2023-12-27 15:59:05 +00:00
README_MMU.txt xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
README_WINDOWS.rst xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
smp.c xtensa: move arch_spin_relax into smp.c 2023-12-13 09:41:24 +01:00
syscall_helper.c xtensa: userspace: simplify syscall helper 2023-11-21 15:49:48 +01:00
thread.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
timing.c includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h> 2022-09-05 16:31:47 +02:00
tls.c arch: migrate includes to <zephyr/...> 2022-05-06 19:57:22 +02:00
userspace.S xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
vector_handlers.c xtensa: print THREADPTR when dumping stack 2024-02-01 13:09:53 -06:00
window_vectors.S arch/xtensa: Rename "ALLOCA" ZSR to "A0SAVE" 2023-11-21 15:49:48 +01:00
xcc_stubs.c arch: migrate includes to <zephyr/...> 2022-05-06 19:57:22 +02:00
xtensa_asm2_util.S xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
xtensa_backtrace.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
xtensa_intgen.py include: add zephyr/ on script generated #include 2022-05-27 15:20:27 -07:00
xtensa_intgen.tmpl xtensa: Interrupt generator script and output for qemu & esp32 2018-02-16 10:44:29 -05:00