zephyr/drivers/serial/Kconfig.ns16550
Charles E. Youse 5dd1bf15fc uart: ns16550: support Apollo Lake PRV_CLOCK_PARAMS (PCP) register
The UARTs on the Apollo Lake SoCs have PLLs that feed the baud rate
generators. This patch allows a user to specify custom M/N values for
those PLLs when custom/high-speed baud rates are required.

I'm not entirely satisfied with the way the PCP values are configured,
because it requires tweaking data in both Kconfig and DeviceTree. For
the time being I've merely taken my cue from another similar feature
(the DLF register support) and have punted on figuring out the "right
way" to expose UART configuration to the application.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-02-28 08:50:34 -08:00

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menuconfig UART_NS16550
bool "NS16550 serial driver"
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
help
This option enables the NS16550 serial driver.
This driver can be used for the serial hardware
available on x86 boards.
config UART_NS16550_PCI
bool "Enable PCI Support"
depends on PCI && UART_NS16550
help
This enables NS16550 to probe for PCI-based serial devices.
This option enables the driver to auto-detect the device
configuration required to access those ports.
config UART_NS16550_DLF
bool "Enable Divisor Latch Fraction (DLF) support"
depends on UART_NS16550
help
This enables support for divisor latch fraction (DLF).
It is used to limit frequency error.
Says n if you are not sure if hardware supports this.
config UART_NS16550_PCP
bool "Enable Apollo Lake PRV_CLOCK_PARAMS (PCP) support"
depends on SOC_APOLLO_LAKE && UART_NS16550
help
This enables configuration of the clock blocks that feed
the UARTs on Apollo Lake SoCs, allowing the generation of
custom baud rates.
Say n unless you know you need this feature.
config UART_NS16550_LINE_CTRL
bool "Enable Serial Line Control for Apps"
depends on UART_LINE_CTRL && UART_NS16550
help
This enables the API for apps to control the serial line,
such as CTS and RTS.
Says n if not sure.
config UART_NS16550_DRV_CMD
bool "Enable Driver Commands"
depends on UART_DRV_CMD && UART_NS16550
help
This enables the API for apps to send commands to driver.
Says n if not sure.
config UART_NS16750
bool "Enable 64-bytes FIFO for UART 16750"
depends on UART_NS16550
help
This enables support for 64-bytes FIFO if UART controller is 16750.
# ---------- Port 0 ----------
menuconfig UART_NS16550_PORT_0
bool "Enable NS16550 Port 0"
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
if !HAS_DTS
config UART_NS16550_PORT_0_NAME
string "Port 0 Device Name"
default "UART_0"
depends on UART_NS16550_PORT_0
help
This is the device name for UART, and is included in the device
struct.
if !HAS_DTS && !ARC
config UART_NS16550_PORT_0_IRQ_PRI
int "Port 0 Interrupt Priority"
default 0
depends on UART_NS16550_PORT_0
help
The interrupt priority for UART port.
endif
config UART_NS16550_PORT_0_BAUD_RATE
int "Port 0 Baud Rate"
default 0
depends on UART_NS16550_PORT_0
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
endif
config UART_NS16550_PORT_0_OPTIONS
int "Port 0 Options"
default 0
depends on UART_NS16550_PORT_0
help
Options used for port initialization.
config UART_NS16550_PORT_0_DLF
hex "Port 0 DLF value"
default 0x0
depends on UART_NS16550_PORT_0 && UART_NS16550_DLF
help
Value for DLF register.
config UART_NS16550_PORT_0_PCP
hex "Port 0 PCP value"
default 0
depends on UART_NS16550_PORT_0 && UART_NS16550_PCP
help
Value for PRV_CLOCK_PARAMS register. If left at its default
value (0), then the kernel will not attempt to set the PCP
for this UART; otherwise be sure the device tree for this
port has sys_clk_freq set accordingly.
config UART_NS16550_PORT_0_PCI
bool "Port 0 is PCI-based"
depends on UART_NS16550_PCI && UART_NS16550_PORT_0
help
Obtain port information from PCI.
# ---------- Port 1 ----------
menuconfig UART_NS16550_PORT_1
bool "Enable NS16550 Port 1"
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
if !HAS_DTS
config UART_NS16550_PORT_1_NAME
string "Port 1 Device Name"
default "UART_1"
depends on UART_NS16550_PORT_1
help
This is the device name for UART, and is included in the device
struct.
if !HAS_DTS && !ARC
config UART_NS16550_PORT_1_IRQ_PRI
int "Port 1 Interrupt Priority"
default 0
depends on UART_NS16550_PORT_1
help
The interrupt priority for UART port.
endif
config UART_NS16550_PORT_1_BAUD_RATE
int "Port 1 Baud Rate"
default 0
depends on UART_NS16550_PORT_1
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
endif
config UART_NS16550_PORT_1_OPTIONS
int "Port 1 Options"
default 0
depends on UART_NS16550_PORT_1
help
Options used for port initialization.
config UART_NS16550_PORT_1_DLF
hex "Port 1 DLF value"
default 0x0
depends on UART_NS16550_PORT_1 && UART_NS16550_DLF
help
Value for DLF register.
config UART_NS16550_PORT_1_PCP
hex "Port 1 PCP value"
default 0
depends on UART_NS16550_PORT_1 && UART_NS16550_PCP
help
Value for PRV_CLOCK_PARAMS register. If left at its default
value (0), then the kernel will not attempt to set the PCP
for this UART; otherwise be sure the device tree for this
port has sys_clk_freq set accordingly.
config UART_NS16550_PORT_1_PCI
bool "Port 1 is PCI-based"
depends on UART_NS16550_PCI && UART_NS16550_PORT_1
help
Obtain port information from PCI.
# ---------- Port 2 ----------
menuconfig UART_NS16550_PORT_2
bool "Enable NS16550 Port 2"
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_NS16550_PORT_2_OPTIONS
int "Port 2 Options"
default 0
depends on UART_NS16550_PORT_2
help
Options used for port initialization.
config UART_NS16550_PORT_2_DLF
hex "Port 2 DLF value"
default 0x0
depends on UART_NS16550_PORT_2 && UART_NS16550_DLF
help
Value for DLF register.
config UART_NS16550_PORT_2_PCP
hex "Port 2 PCP value"
default 0
depends on UART_NS16550_PORT_2 && UART_NS16550_PCP
help
Value for PRV_CLOCK_PARAMS register. If left at its default
value (0), then the kernel will not attempt to set the PCP
for this UART; otherwise be sure the device tree for this
port has sys_clk_freq set accordingly.
config UART_NS16550_PORT_2_PCI
bool "Port 2 is PCI-based"
depends on UART_NS16550_PCI && UART_NS16550_PORT_2
help
Obtain port information from PCI.
# ---------- Port 3 ----------
menuconfig UART_NS16550_PORT_3
bool "Enable NS16550 Port 3"
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_NS16550_PORT_3_OPTIONS
int "Port 3 Options"
default 0
depends on UART_NS16550_PORT_3
help
Options used for port initialization.
config UART_NS16550_PORT_3_DLF
hex "Port 3 DLF value"
default 0x0
depends on UART_NS16550_PORT_3 && UART_NS16550_DLF
help
Value for DLF register.
config UART_NS16550_PORT_3_PCP
hex "Port 3 PCP value"
default 0
depends on UART_NS16550_PORT_3 && UART_NS16550_PCP
help
Value for PRV_CLOCK_PARAMS register. If left at its default
value (0), then the kernel will not attempt to set the PCP
for this UART; otherwise be sure the device tree for this
port has sys_clk_freq set accordingly.
config UART_NS16550_PORT_3_PCI
bool "Port 3 is PCI-based"
depends on UART_NS16550_PCI && UART_NS16550_PORT_3
help
Obtain port information from PCI.