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zephyr/drivers/serial/Kconfig.ns16550

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serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
menuconfig UART_NS16550
bool "NS16550 serial driver"
select SERIAL_HAS_DRIVER
serial: introduce SERIAL_SUPPORT_INTERRUPT Kconfig option As not all drivers support interrupts we don't have a means to know if we can allow UART_INTERRUPT_DRIVEN to be enabled and thus various Kconfig options that select UART_INTERRUPT_DRIVEN. Some drivers have a interrupts, however not all do. So introduce a Kconfig option to let us know what the driver actually supports. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-22 18:26:58 +02:00
select SERIAL_SUPPORT_INTERRUPT
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
help
This option enables the NS16550 serial driver.
This driver can be used for the serial hardware
doc: Fix terminology in Kconfig files for 'platform' Completing the terminology change started with change 4008 by updating the Kconfig files processed to produce the online documentation, plus header files processed by doxygen. References to 'platform' are change to 'board' Change-Id: Id0ed3dc1439a0ea0a4bd19d4904889cf79bec33e Jira: ZEP-534 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2016-08-18 01:33:08 +02:00
available on x86 boards.
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PCI
bool "Enable PCI Support"
depends on PCI && UART_NS16550
help
This enables NS16550 to probe for PCI-based serial devices.
This option enables the driver to auto-detect the device
configuration required to access those ports.
uart/ns16550: support divisor latch fraction (DLF) The UART on Quark SE and D2000 supports fractional clock divider. It is used to limit frequency error for supported baud rates. Change-Id: I1f39a95db09f4a5a4116edc700a10e4b9ecfa2bd Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-01-06 18:17:02 +01:00
config UART_NS16550_DLF
bool "Enable Divisor Latch Fraction (DLF) support"
serial/ns16550: reduce number of kconfig options Moves those kconfig options which should be declared in SoC or board header files instead. These are the one that are tied to SoC or board and there is no need for them to be configurable in kconfig. Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-29 20:01:11 +02:00
depends on UART_NS16550
uart/ns16550: support divisor latch fraction (DLF) The UART on Quark SE and D2000 supports fractional clock divider. It is used to limit frequency error for supported baud rates. Change-Id: I1f39a95db09f4a5a4116edc700a10e4b9ecfa2bd Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-01-06 18:17:02 +01:00
help
This enables support for divisor latch fraction (DLF).
It is used to limit frequency error.
Says n if you are not sure if hardware supports this.
uart: ns16550: support Apollo Lake PRV_CLOCK_PARAMS (PCP) register The UARTs on the Apollo Lake SoCs have PLLs that feed the baud rate generators. This patch allows a user to specify custom M/N values for those PLLs when custom/high-speed baud rates are required. I'm not entirely satisfied with the way the PCP values are configured, because it requires tweaking data in both Kconfig and DeviceTree. For the time being I've merely taken my cue from another similar feature (the DLF register support) and have punted on figuring out the "right way" to expose UART configuration to the application. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-02-24 00:18:28 +01:00
config UART_NS16550_PCP
bool "Enable Apollo Lake PRV_CLOCK_PARAMS (PCP) support"
depends on SOC_APOLLO_LAKE && UART_NS16550
help
This enables configuration of the clock blocks that feed
the UARTs on Apollo Lake SoCs, allowing the generation of
custom baud rates.
Say n unless you know you need this feature.
uart/ns16550: implements new API of line control This implements the newly introduced APIs to manipulate line controls for UART. This also implements the driver command API as setting baud rate may require setting the DLF. Change-Id: I80634aa3fbd4a3223c46edb61417123e36f439dd Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-01-06 18:17:03 +01:00
config UART_NS16550_LINE_CTRL
bool "Enable Serial Line Control for Apps"
depends on UART_LINE_CTRL && UART_NS16550
help
This enables the API for apps to control the serial line,
such as CTS and RTS.
Says n if not sure.
config UART_NS16550_DRV_CMD
bool "Enable Driver Commands"
depends on UART_DRV_CMD && UART_NS16550
help
This enables the API for apps to send commands to driver.
Says n if not sure.
serial: enable 64-bytes FIFO for UART 16750 in uart_ns16550 driver UART 16750 is basically a UART 16550 with a 64-bytes FIFO. The 64-bytes FIFO can be enabled via register FCR. Account for it in the uart_ns16550 driver whenever the CONFIG_UART_NS16750 variable is set. Change-Id: I2342b28a41d03c96410bbfbe57e4b5a4e335731d Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2016-11-15 03:23:45 +01:00
config UART_NS16750
bool "Enable 64-bytes FIFO for UART 16750"
depends on UART_NS16550
help
This enables support for 64-bytes FIFO if UART controller is 16750.
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
# ---------- Port 0 ----------
menuconfig UART_NS16550_PORT_0
bool "Enable NS16550 Port 0"
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
drivers/uart: Use dts to set uart options for ns16550 driver Fix the ns16550 uart driver and relevant SoCs accordingly. All generic settings are now DTS based. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-03-05 14:38:50 +01:00
dts: x86: qemu_x86: Add device support for uart ns16550 Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-09-07 20:16:27 +02:00
if !HAS_DTS
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_0_NAME
string "Port 0 Device Name"
default "UART_0"
depends on UART_NS16550_PORT_0
help
This is the device name for UART, and is included in the device
struct.
arch: arc: em{7,9,11}d: Add initial DTS UART support Add support for getting some basic params from the DTS for the UART. The ns16550 driver still needs to be updated to get IRQ and address info from DTS. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-15 01:55:07 +01:00
if !HAS_DTS && !ARC
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_0_IRQ_PRI
int "Port 0 Interrupt Priority"
default 0
depends on UART_NS16550_PORT_0
help
The interrupt priority for UART port.
arch: arc: em{7,9,11}d: Add initial DTS UART support Add support for getting some basic params from the DTS for the UART. The ns16550 driver still needs to be updated to get IRQ and address info from DTS. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-15 01:55:07 +01:00
endif
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_0_BAUD_RATE
int "Port 0 Baud Rate"
default 0
depends on UART_NS16550_PORT_0
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
dts: x86: qemu_x86: Add device support for uart ns16550 Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-09-07 20:16:27 +02:00
endif
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_0_OPTIONS
int "Port 0 Options"
default 0
depends on UART_NS16550_PORT_0
help
Options used for port initialization.
uart/ns16550: support divisor latch fraction (DLF) The UART on Quark SE and D2000 supports fractional clock divider. It is used to limit frequency error for supported baud rates. Change-Id: I1f39a95db09f4a5a4116edc700a10e4b9ecfa2bd Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-01-06 18:17:02 +01:00
config UART_NS16550_PORT_0_DLF
hex "Port 0 DLF value"
default 0x0
depends on UART_NS16550_PORT_0 && UART_NS16550_DLF
help
Value for DLF register.
uart: ns16550: support Apollo Lake PRV_CLOCK_PARAMS (PCP) register The UARTs on the Apollo Lake SoCs have PLLs that feed the baud rate generators. This patch allows a user to specify custom M/N values for those PLLs when custom/high-speed baud rates are required. I'm not entirely satisfied with the way the PCP values are configured, because it requires tweaking data in both Kconfig and DeviceTree. For the time being I've merely taken my cue from another similar feature (the DLF register support) and have punted on figuring out the "right way" to expose UART configuration to the application. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-02-24 00:18:28 +01:00
config UART_NS16550_PORT_0_PCP
hex "Port 0 PCP value"
default 0
depends on UART_NS16550_PORT_0 && UART_NS16550_PCP
help
Value for PRV_CLOCK_PARAMS register. If left at its default
value (0), then the kernel will not attempt to set the PCP
for this UART; otherwise be sure the device tree for this
port has sys_clk_freq set accordingly.
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_0_PCI
bool "Port 0 is PCI-based"
depends on UART_NS16550_PCI && UART_NS16550_PORT_0
help
Obtain port information from PCI.
# ---------- Port 1 ----------
menuconfig UART_NS16550_PORT_1
bool "Enable NS16550 Port 1"
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
dts: x86: qemu_x86: Add device support for uart ns16550 Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-09-07 20:16:27 +02:00
if !HAS_DTS
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_1_NAME
string "Port 1 Device Name"
default "UART_1"
depends on UART_NS16550_PORT_1
help
This is the device name for UART, and is included in the device
struct.
arch: arc: em{7,9,11}d: Add initial DTS UART support Add support for getting some basic params from the DTS for the UART. The ns16550 driver still needs to be updated to get IRQ and address info from DTS. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-15 01:55:07 +01:00
if !HAS_DTS && !ARC
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_1_IRQ_PRI
int "Port 1 Interrupt Priority"
default 0
depends on UART_NS16550_PORT_1
help
The interrupt priority for UART port.
arch: arc: em{7,9,11}d: Add initial DTS UART support Add support for getting some basic params from the DTS for the UART. The ns16550 driver still needs to be updated to get IRQ and address info from DTS. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-15 01:55:07 +01:00
endif
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_1_BAUD_RATE
int "Port 1 Baud Rate"
default 0
depends on UART_NS16550_PORT_1
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
dts: x86: qemu_x86: Add device support for uart ns16550 Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-09-07 20:16:27 +02:00
endif
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-01 17:42:19 +01:00
config UART_NS16550_PORT_1_OPTIONS
int "Port 1 Options"
default 0
depends on UART_NS16550_PORT_1
help
Options used for port initialization.
uart/ns16550: support divisor latch fraction (DLF) The UART on Quark SE and D2000 supports fractional clock divider. It is used to limit frequency error for supported baud rates. Change-Id: I1f39a95db09f4a5a4116edc700a10e4b9ecfa2bd Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-01-06 18:17:02 +01:00
config UART_NS16550_PORT_1_DLF
hex "Port 1 DLF value"
default 0x0
depends on UART_NS16550_PORT_1 && UART_NS16550_DLF
help
Value for DLF register.
drivers/serial: Add port 2 instance in ns16550 driver Looks lik ARC arch snps_esmk can provide a 3rd port of this controller, so let's add the necessary bits and pieces to get it instanciated if one enable this port in DTS. PCI settings are not introduced for that port as there is no known arch/board exposing a 3rd port on PCI bus. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-17 17:46:52 +02:00
uart: ns16550: support Apollo Lake PRV_CLOCK_PARAMS (PCP) register The UARTs on the Apollo Lake SoCs have PLLs that feed the baud rate generators. This patch allows a user to specify custom M/N values for those PLLs when custom/high-speed baud rates are required. I'm not entirely satisfied with the way the PCP values are configured, because it requires tweaking data in both Kconfig and DeviceTree. For the time being I've merely taken my cue from another similar feature (the DLF register support) and have punted on figuring out the "right way" to expose UART configuration to the application. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-02-24 00:18:28 +01:00
config UART_NS16550_PORT_1_PCP
hex "Port 1 PCP value"
default 0
depends on UART_NS16550_PORT_1 && UART_NS16550_PCP
help
Value for PRV_CLOCK_PARAMS register. If left at its default
value (0), then the kernel will not attempt to set the PCP
for this UART; otherwise be sure the device tree for this
port has sys_clk_freq set accordingly.
drivers: uart_ns16550: restore config UART_NS16550_PORT_1_PCI The CONFIG_UART_NS16550_PORT_1_PCI was accidentally removed in commit 26b474c987ce2666d25f79d8768753ba78172166. So adds it back. This allows PCI driver to probe the resources for port 1. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-16 21:43:01 +02:00
config UART_NS16550_PORT_1_PCI
bool "Port 1 is PCI-based"
depends on UART_NS16550_PCI && UART_NS16550_PORT_1
help
Obtain port information from PCI.
drivers/serial: Add port 2 instance in ns16550 driver Looks lik ARC arch snps_esmk can provide a 3rd port of this controller, so let's add the necessary bits and pieces to get it instanciated if one enable this port in DTS. PCI settings are not introduced for that port as there is no known arch/board exposing a 3rd port on PCI bus. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-17 17:46:52 +02:00
# ---------- Port 2 ----------
menuconfig UART_NS16550_PORT_2
bool "Enable NS16550 Port 2"
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_NS16550_PORT_2_OPTIONS
int "Port 2 Options"
default 0
depends on UART_NS16550_PORT_2
help
Options used for port initialization.
config UART_NS16550_PORT_2_DLF
hex "Port 2 DLF value"
default 0x0
depends on UART_NS16550_PORT_2 && UART_NS16550_DLF
help
Value for DLF register.
drivers/serial: ns16550: extend to support 4 ports This extends the NS16550 driver to support 4 ports. Also, this adds the necessary bits to enable PCI enumeration on port 2. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-19 19:43:08 +02:00
uart: ns16550: support Apollo Lake PRV_CLOCK_PARAMS (PCP) register The UARTs on the Apollo Lake SoCs have PLLs that feed the baud rate generators. This patch allows a user to specify custom M/N values for those PLLs when custom/high-speed baud rates are required. I'm not entirely satisfied with the way the PCP values are configured, because it requires tweaking data in both Kconfig and DeviceTree. For the time being I've merely taken my cue from another similar feature (the DLF register support) and have punted on figuring out the "right way" to expose UART configuration to the application. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-02-24 00:18:28 +01:00
config UART_NS16550_PORT_2_PCP
hex "Port 2 PCP value"
default 0
depends on UART_NS16550_PORT_2 && UART_NS16550_PCP
help
Value for PRV_CLOCK_PARAMS register. If left at its default
value (0), then the kernel will not attempt to set the PCP
for this UART; otherwise be sure the device tree for this
port has sys_clk_freq set accordingly.
drivers/serial: ns16550: extend to support 4 ports This extends the NS16550 driver to support 4 ports. Also, this adds the necessary bits to enable PCI enumeration on port 2. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-19 19:43:08 +02:00
config UART_NS16550_PORT_2_PCI
bool "Port 2 is PCI-based"
depends on UART_NS16550_PCI && UART_NS16550_PORT_2
help
Obtain port information from PCI.
# ---------- Port 3 ----------
menuconfig UART_NS16550_PORT_3
bool "Enable NS16550 Port 3"
depends on UART_NS16550
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_NS16550_PORT_3_OPTIONS
int "Port 3 Options"
default 0
depends on UART_NS16550_PORT_3
help
Options used for port initialization.
config UART_NS16550_PORT_3_DLF
hex "Port 3 DLF value"
default 0x0
depends on UART_NS16550_PORT_3 && UART_NS16550_DLF
help
Value for DLF register.
uart: ns16550: support Apollo Lake PRV_CLOCK_PARAMS (PCP) register The UARTs on the Apollo Lake SoCs have PLLs that feed the baud rate generators. This patch allows a user to specify custom M/N values for those PLLs when custom/high-speed baud rates are required. I'm not entirely satisfied with the way the PCP values are configured, because it requires tweaking data in both Kconfig and DeviceTree. For the time being I've merely taken my cue from another similar feature (the DLF register support) and have punted on figuring out the "right way" to expose UART configuration to the application. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-02-24 00:18:28 +01:00
config UART_NS16550_PORT_3_PCP
hex "Port 3 PCP value"
default 0
depends on UART_NS16550_PORT_3 && UART_NS16550_PCP
help
Value for PRV_CLOCK_PARAMS register. If left at its default
value (0), then the kernel will not attempt to set the PCP
for this UART; otherwise be sure the device tree for this
port has sys_clk_freq set accordingly.
drivers/serial: ns16550: extend to support 4 ports This extends the NS16550 driver to support 4 ports. Also, this adds the necessary bits to enable PCI enumeration on port 2. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-19 19:43:08 +02:00
config UART_NS16550_PORT_3_PCI
bool "Port 3 is PCI-based"
depends on UART_NS16550_PCI && UART_NS16550_PORT_3
help
Obtain port information from PCI.
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