87eea6e6b1
According to board documentation: "By default System
clock is driven by the MSI clock at 48MHz."
This is in line with rcc node dts configuration:
&rcc {
[...]
clocks = <&clk_msi>;
[...]
};
Though pll node is currently enabled, which is not in line with
current dts clocks description scheme and results to compilation
issue in clock_control driver.
Remove pll node configuration to fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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| .. | ||
| doc | ||
| support | ||
| board.cmake | ||
| Kconfig.board | ||
| Kconfig.defconfig | ||
| lora_e5_dev_board.dts | ||
| lora_e5_dev_board.yaml | ||
| lora_e5_dev_board_defconfig | ||