806c95163a
This commit adds/modifies `riscv,isa` strings using the following rules: * the ISA string is lowercase * multi-letter extensions are preceded with the underscore mark * if an extension is implied by another one, it is not specified - e.g. the D extension implies the F extension, so writing `rv32ifd` is redundant Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
9 lines
181 B
YAML
9 lines
181 B
YAML
# Copyright (C) 2023, Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: INTEL FPGA NIOSV Softcore Processor
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compatible: "intel,niosv"
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include: riscv,cpus.yaml
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